IOP: We will use an abstraction to validate the caches

This commit is contained in:
Correia 2024-05-19 20:19:46 -03:00
parent 7a30ff87f0
commit c186ce0675
9 changed files with 295 additions and 23 deletions

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@ -1,3 +1,4 @@
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@ -24,7 +24,7 @@ namespace cosmic::gs {
bool GsEngine::isStalled() {
return {};
}
u32 GsEngine::privileged(GsRegisters gsr) {
u32 GsEngine::privileged(GsRegisters gsr) const {
if (gsr == GsBusDir) {
return gsPrivateRegs.busDir;
}

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@ -53,7 +53,7 @@ namespace cosmic::gs {
void resetGraphics();
std::tuple<bool, os::vec> readGsData();
bool isStalled();
u32 privileged(GsRegisters gsr);
u32 privileged(GsRegisters gsr) const;
bool isSoftwareMode{};
void gsWrite(u32 addr, u64 data);

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@ -10,7 +10,7 @@ namespace cosmic::iop {
status.iep = status.ieo;
}
static const u8 mask{0xff};
u32 IopCop::mfc(u8 copId) {
u32 IopCop::mfc(u8 copId) const {
u32 mcVar{};
switch (copId) {
case 12: {
@ -38,6 +38,8 @@ namespace cosmic::iop {
mcVar = ePC; break;
case 15:
mcVar = c0id; break;
default:
mcVar = {};
}
return mcVar;
}

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@ -41,7 +41,7 @@ namespace cosmic::iop {
u32 ePC;
u32 c0id;
u32 mfc(u8 copId);
u32 mfc(u8 copId) const;
void mtc(u8 copId, u32 regVal);
// Return from exception (COP0)
void rfe();

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@ -15,10 +15,11 @@ namespace cosmic::iop {
IoMipsCore::IoMipsCore(std::shared_ptr<mio::MemoryPipe>& pipe) :
iopMem(pipe) {
interpreter = std::make_unique<creeper::psx::IopInterpreter>(*this);
for (auto& ic : instCache) {
ic.data = ic.tag = {};
ic.isValid = {};
interpreter = std::make_unique<creeper::psx::IopInterpreter>(*this);
for (auto& cache : instCache) {
cache.data = {};
cache.tag = {};
// cache.isValid = {};
}
}
u32 IoMipsCore::iopPrivateAddrSolver(u32 address) {
@ -55,6 +56,10 @@ namespace cosmic::iop {
cacheCtrl = 0;
mathDelay = branchDelay = 0;
onBranch = false;
ranges::for_each(instCache, [](auto& validLine) {
validLine.isValid = {};
});
user->info("(IOP): Reset finished, IOP->PC: {}", ioPc);
}
void IoMipsCore::pulse(u32 cycles) {
@ -67,26 +72,27 @@ namespace cosmic::iop {
}
}
u32 IoMipsCore::fetchByPc() {
lastPc = ioPc;
if (isPcUncached(ioPc)) {
// Reading directly from IO RAM incurs a penalty of 4 machine cycles
cyclesToIo -= 4;
mathDelay = std::max(mathDelay - 4, 0);
return iopRead<u32>(incPc());
}
const u32 tag{((ioPc & 0xffff'f000) >> 0xc) | 1};
const u32 tag{(ioPc & 0xffff'f000) >> 0xc};
const u32 index{(ioPc & 0xffc) >> 2};
if (index > instCache.size()) {
}
auto ioc{std::addressof(instCache.at(index))};
if (ioc->tag == tag) {
if (ioc->tag == tag && ioc->isValid) {
cacheHit++;
incPc();
return ioc->data;
}
cacheMiss++;
const u32 ioOpcode{iopRead<u32>(incPc())};
ioc->data = ioOpcode;
ioc->isValid = true;
return ioOpcode;
}
u32 IoMipsCore::incPc() {
@ -109,8 +115,8 @@ namespace cosmic::iop {
if (code == busError) {
// R2-R3 or v0-v1 -> Subroutine return values, may be changed by subroutines
if (!(ioPc & 0x3 || ioGPRs[2] & 0x1 || ioGPRs[3] & 0x1))
if (!(ioGPRs[28] & 0x1 || ioGPRs[29] & 0x1))
;
if (!(ioGPRs[28] & 0x1 || ioGPRs[29] & 0x1)) {
}
}
// There are only two exception handler addresses,
// and we can decide by looking the bootstrap status
@ -132,7 +138,7 @@ namespace cosmic::iop {
// KUSeg, KSeg2
return address;
}
bool IoMipsCore::isPcUncached(u32 pc) {
bool IoMipsCore::isPcUncached(u32 pc) const {
return pc >= 0xa0000000 || !(cacheCtrl & (1 << 11));
}
bool IoMipsCore::isRoRegion(u32 address) {

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@ -26,14 +26,14 @@ namespace cosmic::iop {
std::array<u32, 32> ioGPRs;
std::array<u8, 1024 * 1> ioScratch;
std::array<IoCache, 1024> instCache;
std::array<IoCache, 0x400> instCache;
u32 cacheCtrl;
u32 cacheHit, cacheMiss;
std::shared_ptr<mio::MemoryPipe> iopMem;
u32 translateAddr(u32 address);
bool isPcUncached(u32 pc);
bool isRoRegion(u32 address);
static u32 translateAddr(u32 address);
bool isPcUncached(u32 pc) const;
static bool isRoRegion(u32 address);
template <typename T>
T iopRead(u32 address) {
@ -70,7 +70,7 @@ namespace cosmic::iop {
void takeBranchIf(bool take, i32 pcAddr);
u8 irqSpawned;
private:
u32 iopPrivateAddrSolver(u32 address);
static u32 iopPrivateAddrSolver(u32 address);
std::unique_ptr<IopExecVe> interpreter;
};

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@ -4,9 +4,9 @@
namespace cosmic::iop {
void IopDma::resetIoDma() {
activeChannel.reset();
for (u8 chan{}; chan < channels.size(); chan++) {
for (u64 chan{}; chan < channels.size(); chan++) {
channels[chan] = {};
channels[chan].index = chan;
channels[chan].index = static_cast<u8>(chan);
}
}
void IopDma::pulse(u32 cycles) {
@ -24,7 +24,7 @@ namespace cosmic::iop {
// When true, it means that we will write into the SPU2 device
bool write2Spu;
Ref<IopChan> channel;
std::array<u32, 2> packet;
std::array<u32, 2> packet{};
channel = std::ref(channels[IopSpu2]);
write2Spu = channel->status.isFrom2Device;