(Creeper): Adds the use of macros in EE instruction declarations

This commit is contained in:
Correia 2024-05-07 19:32:39 -03:00
parent 3f1302c2d9
commit d1257a5afa
13 changed files with 123 additions and 86 deletions

View File

@ -44,12 +44,13 @@ target_sources(cosmic PRIVATE
${COSMIC_DIR}/creeper/fastmem.cpp
${COSMIC_DIR}/creeper/psx/iop_interpreter.cpp
${COSMIC_DIR}/creeper/psx/psx_ep1.cpp
${COSMIC_DIR}/creeper/ee/fpu.cpp
${COSMIC_DIR}/creeper/ee/mipsiv_cached.cpp
${COSMIC_DIR}/creeper/ee/mipsiv_opcodes.cpp
${COSMIC_DIR}/creeper/ee/mipsiv_isa.cpp
${COSMIC_DIR}/creeper/ee/mipsiv_math.cpp
${COSMIC_DIR}/creeper/ee/cop_isa.cpp
${COSMIC_DIR}/creeper/ee/iv_addons_fpu.cpp
${COSMIC_DIR}/creeper/ee/iv_cached.cpp
${COSMIC_DIR}/creeper/ee/iv_opcodes.cpp
${COSMIC_DIR}/creeper/ee/iv_mips.cpp
${COSMIC_DIR}/creeper/ee/iv_special.cpp
${COSMIC_DIR}/creeper/ee/iv_math.cpp
${COSMIC_DIR}/creeper/ee/iv_cop.cpp
${COSMIC_DIR}/creeper/micro/vum_code.cpp
${COSMIC_DIR}/creeper/micro/int_lower1.cpp
${COSMIC_DIR}/creeper/micro/float_vectorization.cpp

View File

@ -1,6 +1,6 @@
// SPDX-short-identifier: MIT, Version N/A
// This file is protected by the MIT license (please refer to LICENSE.md before making any changes, copying, or redistributing this software)
#include <creeper/ee/mipsiv_cached.h>
#include <creeper/ee/iv_cached.h>
#include <engine/ee_core.h>
#include <common/global.h>
@ -8,7 +8,7 @@
namespace cosmic::creeper::ee {
std::array<f32, 3> fo{};
u8 dest{};
#define CHECK_UO(d)\
#define CHK_OVER_OR_UNDER(d)\
fpu->checkOverflow(d);\
fpu->checkUnderflow(d)
@ -22,13 +22,13 @@ namespace cosmic::creeper::ee {
dest = static_cast<u8>((ops.inst >> 6) & 0x1f);
fpu->fprRegs[dest].decimal = fo[2] + (fo[0] * fo[1]);
CHECK_UO(dest);
CHK_OVER_OR_UNDER(dest);
}
void MipsIvInterpreter::fpuAdda(Operands ops) {
fo[0] = fpu->sony754con(fpu->fprRegs[ops.rd].un);
fo[1] = fpu->sony754con(fpu->fprRegs[ops.rt].un);
fpu->acc.decimal = fo[0] + fo[1];
CHECK_UO(32);
CHK_OVER_OR_UNDER(32);
}
}

View File

@ -2,7 +2,7 @@
// This file is protected by the MIT license (please refer to LICENSE.md before making any changes, copying, or redistributing this software)
#include <range/v3/algorithm.hpp>
#include <creeper/ee/mipsiv_cached.h>
#include <creeper/ee/iv_cached.h>
#include <common/global.h>
#include <vm/emu_vm.h>
#include <engine/ee_core.h>

View File

@ -88,7 +88,7 @@ namespace cosmic::creeper::ee {
static void bgezall(Operands ops);
static void mtsab(Operands ops);
static void mtsah(Operands ops);
static void ivSyscall(Operands ops);
static void iSyscall(Operands ops);
// Memory read functions through direct translation
static void lb(Operands ops);
@ -104,7 +104,7 @@ namespace cosmic::creeper::ee {
static void cache(Operands ops);
static void nop(Operands ops);
static void ivBreak(Operands ops);
static void iBreak(Operands ops);
static void sll(Operands ops);
static void srl(Operands ops);
@ -127,7 +127,11 @@ namespace cosmic::creeper::ee {
static void dsubu(Operands ops);
static void slt(Operands ops);
static void ivXor(Operands ops);
#define DECLARE_INST_IV_FUNC(name)\
static void name(Operands);
DECLARE_INST_IV_FUNC(ori);
DECLARE_INST_IV_FUNC(xori);
static void bne(Operands ops);
// Instructions intrinsically related to Cop0 and TLB/Exception

View File

@ -1,6 +1,6 @@
// SPDX-short-identifier: MIT, Version N/A
// This file is protected by the MIT license (please refer to LICENSE.md before making any changes, copying, or redistributing this software)
#include <creeper/ee/mipsiv_cached.h>
#include <creeper/ee/iv_cached.h>
#include <engine/ee_core.h>
namespace cosmic::creeper::ee {
void MipsIvInterpreter::tlbr(Operands ops) {
@ -8,10 +8,9 @@ namespace cosmic::creeper::ee {
control->loadFromGprToTlb(*entry);
}
void MipsIvInterpreter::c0mfc(Operands ops) {
u32 res;
if (ops.rd == 0)
return;
res = control->mfc0(ops.rd);
auto res = control->mfc0(ops.rd);
*(cpu->gprAt<u32>(ops.rt)) = res;
}
void MipsIvInterpreter::c0mtc(Operands ops) {

View File

@ -0,0 +1,17 @@
#pragma once
#define RD_DW cpu->GPRs[ops.rd].dw[0]
#define RS_DW cpu->GPRs[ops.rs].dw[0]
#define RT_DW cpu->GPRs[ops.rt].dw[0]
#define RD_SW cpu->GPRs[ops.rd].sdw[0]
#define RS_SW cpu->GPRs[ops.rs].sdw[0]
#define RT_SW cpu->GPRs[ops.rt].sdw[0]
// #define RD_WORDS cpu->GPRs[ops.rd].words[0]
#define RS_WORDS cpu->GPRs[ops.rs].words[0]
#define RT_WORDS cpu->GPRs[ops.rt].words[0]
// #define RD_WORDS_S cpu->GPRs[ops.rd].swords[0]
#define RS_WORDS_S cpu->GPRs[ops.rs].swords[0]
#define RT_WORDS_S cpu->GPRs[ops.rt].swords[0]

View File

@ -1,5 +1,8 @@
#include <creeper/ee/mipsiv_cached.h>
#include <creeper/ee/iv_cached.h>
#include <creeper/ee/iv_macros.h>
#include <engine/ee_core.h>
#include <console/backdoor.h>
namespace cosmic::creeper::ee {
void MipsIvInterpreter::mult(Operands ops) {
i32 fi{cpu->GPRs[ops.rs].swords[0]};
@ -37,57 +40,44 @@ namespace cosmic::creeper::ee {
}
}
void MipsIvInterpreter::add(Operands ops) {
cpu->GPRs[ops.rd].sdw[0] = cpu->GPRs[ops.rs].swords[0] + cpu->GPRs[ops.rt].swords[0];
#define DECLARE_MATH_IV(name, op)\
void MipsIvInterpreter::name(Operands ops) {\
cpu->GPRs[ops.rd].sdw[0] = RS_WORDS_S op RT_WORDS_S;\
}
void MipsIvInterpreter::addu(Operands ops) {
cpu->GPRs[ops.rd].dw[0] = cpu->GPRs[ops.rs].words[0] + cpu->GPRs[ops.rt].words[0];
}
void MipsIvInterpreter::sub(Operands ops) {
cpu->GPRs[ops.rd].sdw[0] = cpu->GPRs[ops.rs].swords[0] - cpu->GPRs[ops.rt].swords[0];
}
void MipsIvInterpreter::subu(Operands ops) {
cpu->GPRs[ops.rd].dw[0] = cpu->GPRs[ops.rs].words[0] - cpu->GPRs[ops.rt].words[0];
}
void MipsIvInterpreter::dadd(Operands ops) {
cpu->GPRs[ops.rd].sdw[0] = cpu->GPRs[ops.rs].sdw[0] + cpu->GPRs[ops.rt].sdw[0];
}
void MipsIvInterpreter::daddu(Operands ops) {
cpu->GPRs[ops.rd].dw[0] = cpu->GPRs[ops.rs].dw[0] + cpu->GPRs[ops.rt].dw[0];
}
void MipsIvInterpreter::dsub(Operands ops) {
cpu->GPRs[ops.rd].sdw[0] = cpu->GPRs[ops.rs].sdw[0] - cpu->GPRs[ops.rt].sdw[0];
}
void MipsIvInterpreter::dsubu(Operands ops) {
cpu->GPRs[ops.rd].dw[0] = cpu->GPRs[ops.rs].dw[0] - cpu->GPRs[ops.rt].dw[0];
}
void MipsIvInterpreter::srav(Operands ops) {
// Shifting by a non immediate value (GPRs)
i64* const shiftTo{cpu->gprAt<i64>(ops.rd)};
*shiftTo = cpu->GPRs[ops.rt].swords[0] >> (cpu->GPRs[ops.rs].sdw[0] & 0x1f);
#define DECLARE_MATH_IV_UNS(name, op)\
void MipsIvInterpreter::name(Operands ops) {\
cpu->GPRs[ops.rd].dw[0] = RS_WORDS op RT_WORDS;\
}
DECLARE_MATH_IV(add, +)
DECLARE_MATH_IV(sub, -)
DECLARE_MATH_IV_UNS(addu, +)
DECLARE_MATH_IV_UNS(subu, -)
void MipsIvInterpreter::ivXor(Operands ops) {
cpu->GPRs[ops.rd].dw[0] =
(cpu->GPRs[ops.rs].dw[0]) ^
(cpu->GPRs[ops.rt].dw[0]);
#define IV_OP_I(op)\
RD_DW = (RS_DW) op (RT_DW)
#define DECLARE_FUNC_IV(name, op)\
void MipsIvInterpreter::name(Operands ops) {\
IV_OP_I(op);\
}
DECLARE_FUNC_IV(ori, |)
DECLARE_FUNC_IV(xori, ^)
void MipsIvInterpreter::slt(Operands ops) {
cpu->GPRs[ops.rd].dw[0] =
cpu->GPRs[ops.rs].sdw[0] < cpu->GPRs[ops.rt].sdw[0];
}
void MipsIvInterpreter::sll(Operands ops) {
if (ops.rt == 0)
return;
u8 shift{static_cast<u8>((ops.inst >> 6) & 0x1f)};
i64* const shiftTo{cpu->gprAt<i64>(ops.rd)};
*shiftTo = static_cast<i32>(cpu->GPRs[ops.rt].words[0] << shift);
}
void MipsIvInterpreter::srl(Operands ops) {
u8 right{static_cast<u8>((ops.inst >> 6) & 0x1f)};
i64* const shiftTo{cpu->gprAt<i64>(ops.rd)};
*shiftTo = static_cast<i32>(cpu->GPRs[ops.rt].words[0] >> right);
#define DECLARE_FUNC_SHIFT(name, op)\
void MipsIvInterpreter::name(Operands ops) {\
if (ops.rt == 0)\
return;\
auto const address{cpu->gprAt<i64>(ops.rd)};\
*address = static_cast<i32>(RT_WORDS op static_cast<u8>((ops.inst >> 6) & 0x1f));\
}
DECLARE_FUNC_SHIFT(sll, <<)
DECLARE_FUNC_SHIFT(srl, >>)
void MipsIvInterpreter::sra(Operands ops) {
i8 withBitSet{static_cast<i8>((ops.inst >> 6) & 0x1f)};
i64* const shiftTo{cpu->gprAt<i64>(ops.rd)};

View File

@ -1,7 +1,7 @@
#include <creeper/ee/mipsiv_cached.h>
#include <creeper/ee/iv_cached.h>
#include <engine/ee_core.h>
#include <console/backdoor.h>
#include <vm/emu_vm.h>
namespace cosmic::creeper::ee {
void MipsIvInterpreter::addi(Operands ops) {
cpu->GPRs[ops.rt].words[0] = ops.pa16[0] + cpu->GPRs[ops.rs].words[0];
@ -99,7 +99,6 @@ namespace cosmic::creeper::ee {
}
void MipsIvInterpreter::cache(Operands ops) {
const i32 as{cpu->GPRs[ops.rs].swords[0] + ops.ps16[0]};
if (ops.pa8[3] == 0x7) {
control->invIndexed(static_cast<u32>(as));
}
@ -119,13 +118,4 @@ namespace cosmic::creeper::ee {
if (cpu->GPRs[ops.rt].dw[0])
cpu->GPRs[ops.rd].dw[0] = cpu->GPRs[ops.rs].dw[0];
}
void MipsIvInterpreter::ivBreak(Operands ops) {
cpu->handleException(1, 0x80000180, 0x9);
}
void MipsIvInterpreter::ivSyscall(Operands ops) {
// We need to directly handle these syscall, instead of cpu.chPc(0x80000180)
control->cause.exCode = 0x8;
vm->dealWithSyscalls();
}
}

View File

@ -1,7 +1,7 @@
// SPDX-short-identifier: MIT, Version N/A
// This file is protected by the MIT license (please refer to LICENSE.md before making any changes, copying, or redistributing this software)
#include <common/global.h>
#include <creeper/ee/mipsiv_cached.h>
#include <creeper/ee/iv_cached.h>
#include <engine/ee_core.h>
namespace cosmic::creeper::ee {
@ -16,8 +16,8 @@ namespace cosmic::creeper::ee {
{SpecialSrav, {srav, "srav"}},
{SpecialMovZ, {movz, "movz"}},
{SpecialMovN, {movn, "movn"}},
{SpecialSyscall, {ivSyscall, "syscall"}},
{SpecialBreak, {ivBreak, "break"}},
{SpecialSyscall, {iSyscall, "syscall"}},
{SpecialBreak, {iBreak, "break"}},
{SpecialMult, {mult, "mult"}},
{SpecialMultu, {multu, "multu"}},
@ -33,7 +33,6 @@ namespace cosmic::creeper::ee {
{SpecialDAddu, {daddu, "daadu"}},
{SpecialDSub, {dsub, "dsub"}},
{SpecialDSubu, {dsubu, "dsubu"}},
{SpecialXor, {ivXor, "xor"}},
{SpecialSlt, {slt, "slt"}}
};
@ -63,7 +62,6 @@ namespace cosmic::creeper::ee {
void MipsIvInterpreter::decodeRegimm(u32 opcode, InvokeOpInfo& codes, EeInstructionSet& set) {
auto imm{static_cast<MipsRegImmOpcodes>((opcode >> 16) & 0x1f)};
if (mapMipsRegimm.contains(imm)) {
codes.execute = [imm](InvokeOpInfo& info) {
mapMipsRegimm[imm].instHandler(info.ops);
@ -120,6 +118,8 @@ namespace cosmic::creeper::ee {
{Bne, {bne, "bne"}},
{Addi, {addi, "addi"}},
{Slti, {slti, "slti"}},
{Ori, {ori, "ori"}},
{Xori, {xori, "xori"}},
{Lui, {lui, "lui"}},
{Lb, {lb, "lb"}},
@ -128,10 +128,10 @@ namespace cosmic::creeper::ee {
{Lbu, {lbu, "lbu"}},
{Lhu, {lhu, "lhu"}},
{Lwu, {lwu, "lwu"}},
{Sw, {sw, "sw"}},
{Cache, {cache, "cache"}},
{Nop, {nop, "nop"}},
{Ld, {ld, "ld"}},
{Sw, {sw, "sw"}}
{Ld, {ld, "ld"}}
};
void MipsIvInterpreter::decodeEmotion(u32 opcode, InvokeOpInfo& microCodes) {
std::array<u8, 3> operands{

View File

@ -0,0 +1,36 @@
#include <creeper/ee/iv_cached.h>
#include <creeper/ee/iv_macros.h>
#include <engine/ee_core.h>
#include <console/backdoor.h>
#include <vm/emu_vm.h>
namespace cosmic::creeper::ee {
#define SPECIAL_IV_OP(name, op)\
void MipsIvInterpreter::name(Operands ops) {\
RD_SW = RS_SW op RT_SW;\
}
#define SPECIAL_IV_OP_UNS(name, op)\
void MipsIvInterpreter::name(Operands ops) {\
RD_DW = RD_DW op RT_DW;\
}
SPECIAL_IV_OP(dadd, +)
SPECIAL_IV_OP(dsub, -)
SPECIAL_IV_OP_UNS(daddu, +)
SPECIAL_IV_OP_UNS(dsubu, -)
void MipsIvInterpreter::srav(Operands ops) {
// Shifting by a non immediate value (GPRs)
auto const address{cpu->gprAt<i64>(ops.rd)};
*address = RT_WORDS_S >> (RS_SW & 0x1f);
}
void MipsIvInterpreter::iBreak([[maybe_unused]] Operands ops) {
cpu->handleException(1, 0x80000180, 0x9);
}
void MipsIvInterpreter::iSyscall(Operands ops) {
// We need to directly handle these syscall, instead of cpu.chPc(0x80000180)
control->cause.exCode = 0x8;
vm->dealWithSyscalls();
}
}

View File

@ -3,7 +3,7 @@
#include <engine/ee_core.h>
#include <engine/copctrl/cop0.h>
#include <creeper/ee/mipsiv_cached.h>
#include <creeper/ee/iv_cached.h>
#include <fishron/ee2arm/jitter_arm64_ee.h>
#include <console/virt_devices.h>
namespace cosmic::engine {

View File

@ -82,18 +82,18 @@ namespace cosmic::engine {
Andi,
Ori,
Xori,
Lui = 0xf,
Lui,
CopOpcodes = 0x10,
Lb = 0x20,
Lh = 0x21,
Lh,
Lw = 0x23,
Lbu = 0x24,
Lhu = 0x25,
Lbu,
Lhu,
Lwu = 0x27,
Sw = 0x2b,
Cache = 0x2f,
Nop = 0x33,
Ld = 0x37,
Sw = 0x2b,
};
extern const std::array<const char*, 32> eeAllGprIdentifier;
}

View File

@ -25,7 +25,7 @@ namespace cosmic::vu {
}
return;
}
// Following DobieStation's steps, we can double the number of cycles and process 1
// Following DobieStation steps, we can double the number of cycles and process 1
// QuadWord (4 * 4) per Bus cycle
u32 doubledCycles{cycles << 2};
if (isVifStalled & MskPath3) {