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https://github.com/stenzek/duckstation.git
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CDROM: Various fixes
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parent
1f13c4ad2c
commit
db777fdabb
@ -82,8 +82,8 @@ static int Run(int argc, char* argv[])
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int main(int argc, char* argv[])
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int main(int argc, char* argv[])
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{
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{
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// set log flags
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// set log flags
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// g_pLog->SetConsoleOutputParams(true, nullptr, LOGLEVEL_DEBUG);
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g_pLog->SetConsoleOutputParams(true, nullptr, LOGLEVEL_DEBUG);
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g_pLog->SetConsoleOutputParams(true, "GPU GPU_HW_OpenGL DMA Pad DigitalController", LOGLEVEL_DEBUG);
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// g_pLog->SetConsoleOutputParams(true, "GPU GPU_HW_OpenGL DMA Pad DigitalController", LOGLEVEL_DEBUG);
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#ifdef Y_BUILD_CONFIG_RELEASE
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#ifdef Y_BUILD_CONFIG_RELEASE
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g_pLog->SetFilterLevel(LOGLEVEL_INFO);
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g_pLog->SetFilterLevel(LOGLEVEL_INFO);
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@ -21,6 +21,14 @@ bool CDROM::Initialize(System* system, DMA* dma, InterruptController* interrupt_
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void CDROM::Reset()
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void CDROM::Reset()
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{
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{
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m_command_state = CommandState::Idle;
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m_command_state = CommandState::Idle;
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m_command = Command::Sync;
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m_command_stage = 0;
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m_command_remaining_ticks = 0;
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m_sector_read_remaining_ticks = 0;
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m_reading = false;
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m_muted = false;
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m_setloc = {};
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m_setloc_dirty = false;
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m_status.bits = 0;
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m_status.bits = 0;
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m_secondary_status.bits = 0;
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m_secondary_status.bits = 0;
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m_interrupt_enable_register = INTERRUPT_REGISTER_MASK;
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m_interrupt_enable_register = INTERRUPT_REGISTER_MASK;
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@ -33,6 +41,16 @@ void CDROM::Reset()
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bool CDROM::DoState(StateWrapper& sw)
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bool CDROM::DoState(StateWrapper& sw)
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{
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{
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sw.Do(&m_command);
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sw.Do(&m_command_stage);
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sw.Do(&m_command_remaining_ticks);
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sw.Do(&m_sector_read_remaining_ticks);
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sw.Do(&m_reading);
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sw.Do(&m_muted);
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sw.Do(&m_setloc.minute);
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sw.Do(&m_setloc.second);
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sw.Do(&m_setloc.frame);
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sw.Do(&m_setloc_dirty);
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sw.Do(&m_command_state);
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sw.Do(&m_command_state);
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sw.Do(&m_status.bits);
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sw.Do(&m_status.bits);
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sw.Do(&m_secondary_status.bits);
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sw.Do(&m_secondary_status.bits);
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@ -41,6 +59,15 @@ bool CDROM::DoState(StateWrapper& sw)
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sw.Do(&m_param_fifo);
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sw.Do(&m_param_fifo);
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sw.Do(&m_response_fifo);
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sw.Do(&m_response_fifo);
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sw.Do(&m_data_fifo);
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sw.Do(&m_data_fifo);
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if (sw.IsReading())
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{
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if (m_command_state == CommandState::WaitForExecute)
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m_system->SetDowncount(m_command_remaining_ticks);
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if (m_reading)
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m_system->SetDowncount(m_sector_read_remaining_ticks);
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}
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return !sw.HasError();
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return !sw.HasError();
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}
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}
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@ -214,6 +241,7 @@ void CDROM::WriteRegister(u32 offset, u8 value)
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{
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{
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case 0:
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case 0:
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{
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{
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// TODO: sector buffer is not the data fifo
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Log_DebugPrintf("Request register <- 0x%02X", value);
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Log_DebugPrintf("Request register <- 0x%02X", value);
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const RequestRegister rr{value};
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const RequestRegister rr{value};
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// if (!rr.BFRD)
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// if (!rr.BFRD)
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@ -296,12 +324,25 @@ void CDROM::UpdateStatusRegister()
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m_status.PRMWRDY = !m_param_fifo.IsFull();
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m_status.PRMWRDY = !m_param_fifo.IsFull();
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m_status.RSLRRDY = !m_response_fifo.IsEmpty();
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m_status.RSLRRDY = !m_response_fifo.IsEmpty();
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m_status.DRQSTS = !m_data_fifo.IsEmpty();
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m_status.DRQSTS = !m_data_fifo.IsEmpty();
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m_status.BUSYSTS = m_command_state != CommandState::Idle;
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m_status.BUSYSTS = m_command_state == CommandState::WaitForExecute;
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}
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}
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u32 CDROM::GetTicksForCommand() const
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u32 CDROM::GetTicksForCommand() const
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{
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{
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return 100;
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switch (m_command)
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{
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case Command::ReadN:
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{
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// more if seeking..
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return 50000;
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}
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case Command::Pause:
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return 50000;
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default:
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return 50000;
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}
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}
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}
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u32 CDROM::GetTicksForRead() const
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u32 CDROM::GetTicksForRead() const
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@ -361,6 +402,7 @@ void CDROM::NextCommandStage(bool wait_for_irq, u32 time)
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m_command_state = CommandState::WaitForIRQClear;
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m_command_state = CommandState::WaitForIRQClear;
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m_command_remaining_ticks = time;
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m_command_remaining_ticks = time;
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m_command_stage++;
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m_command_stage++;
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UpdateStatusRegister();
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if (wait_for_irq)
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if (wait_for_irq)
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return;
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return;
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@ -442,7 +484,7 @@ void CDROM::ExecuteCommand()
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m_setloc.minute = BCDToDecimal(m_param_fifo.Peek(0));
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m_setloc.minute = BCDToDecimal(m_param_fifo.Peek(0));
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m_setloc.second = BCDToDecimal(m_param_fifo.Peek(1));
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m_setloc.second = BCDToDecimal(m_param_fifo.Peek(1));
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m_setloc.frame = BCDToDecimal(m_param_fifo.Peek(2));
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m_setloc.frame = BCDToDecimal(m_param_fifo.Peek(2));
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m_location_dirty = true;
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m_setloc_dirty = true;
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Log_DebugPrintf("CDROM setloc command (%u, %u, %u)", ZeroExtend32(m_setloc.minute), ZeroExtend32(m_setloc.second),
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Log_DebugPrintf("CDROM setloc command (%u, %u, %u)", ZeroExtend32(m_setloc.minute), ZeroExtend32(m_setloc.second),
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ZeroExtend32(m_setloc.frame));
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ZeroExtend32(m_setloc.frame));
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m_response_fifo.Push(m_secondary_status.bits);
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m_response_fifo.Push(m_secondary_status.bits);
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@ -459,7 +501,7 @@ void CDROM::ExecuteCommand()
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if (m_command_stage == 0)
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if (m_command_stage == 0)
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{
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{
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Assert(m_location_dirty);
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Assert(m_setloc_dirty);
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StopReading();
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StopReading();
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if (!m_media || !m_media->Seek(m_setloc.minute, m_setloc.second - 2 /* pregap */, m_setloc.frame))
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if (!m_media || !m_media->Seek(m_setloc.minute, m_setloc.second - 2 /* pregap */, m_setloc.frame))
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{
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{
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@ -467,7 +509,7 @@ void CDROM::ExecuteCommand()
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return;
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return;
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}
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}
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m_location_dirty = false;
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m_setloc_dirty = false;
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m_secondary_status.motor_on = true;
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m_secondary_status.motor_on = true;
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m_secondary_status.seeking = true;
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m_secondary_status.seeking = true;
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m_response_fifo.Push(m_secondary_status.bits);
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m_response_fifo.Push(m_secondary_status.bits);
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@ -504,13 +546,13 @@ void CDROM::ExecuteCommand()
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StopReading();
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StopReading();
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// TODO: Seek timing and clean up...
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// TODO: Seek timing and clean up...
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if (m_location_dirty)
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if (m_setloc_dirty)
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{
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{
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if (!m_media || !m_media->Seek(m_setloc.minute, m_setloc.second - 2 /* pregap */, m_setloc.frame))
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if (!m_media || !m_media->Seek(m_setloc.minute, m_setloc.second - 2 /* pregap */, m_setloc.frame))
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{
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{
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Panic("Seek error");
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Panic("Seek error");
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}
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}
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m_location_dirty = false;
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m_setloc_dirty = false;
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}
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}
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EndCommand();
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EndCommand();
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@ -524,11 +566,12 @@ void CDROM::ExecuteCommand()
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{
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{
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if (m_command_stage == 0)
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if (m_command_stage == 0)
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{
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{
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const bool was_reading = m_reading;
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Log_DebugPrintf("CDROM pause command");
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Log_DebugPrintf("CDROM pause command");
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m_response_fifo.Push(m_secondary_status.bits);
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m_response_fifo.Push(m_secondary_status.bits);
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SetInterrupt(Interrupt::INT3);
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SetInterrupt(Interrupt::INT3);
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StopReading();
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StopReading();
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NextCommandStage(true, 1000);
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NextCommandStage(true, was_reading ? (m_mode.double_speed ? 2000000 : 1000000) : 1000);
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}
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}
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else
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else
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{
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{
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@ -172,6 +172,9 @@ private:
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bool m_reading = false;
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bool m_reading = false;
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bool m_muted = false;
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bool m_muted = false;
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Loc m_setloc = {};
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bool m_setloc_dirty = false;
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StatusRegister m_status = {};
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StatusRegister m_status = {};
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SecondaryStatusRegister m_secondary_status = {};
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SecondaryStatusRegister m_secondary_status = {};
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ModeRegister m_mode = {};
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ModeRegister m_mode = {};
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@ -182,7 +185,4 @@ private:
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InlineFIFOQueue<u8, PARAM_FIFO_SIZE> m_param_fifo;
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InlineFIFOQueue<u8, PARAM_FIFO_SIZE> m_param_fifo;
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InlineFIFOQueue<u8, RESPONSE_FIFO_SIZE> m_response_fifo;
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InlineFIFOQueue<u8, RESPONSE_FIFO_SIZE> m_response_fifo;
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HeapFIFOQueue<u8, DATA_FIFO_SIZE> m_data_fifo;
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HeapFIFOQueue<u8, DATA_FIFO_SIZE> m_data_fifo;
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Loc m_setloc = {};
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bool m_location_dirty = false;
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};
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};
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