Commit Graph

  • 5babc076f5 Bitfield: Fix incorrect shift in operator<<= Connor McLaughlin 2019-09-15 12:42:43 +1000
  • d58dbe04c0 CPU: Fix load delay register reads for same register in delay slot Connor McLaughlin 2019-09-15 12:16:51 +1000
  • 1bb794dd39 GPU: Use max vertex count based on buffer size Connor McLaughlin 2019-09-15 01:18:58 +1000
  • a58b687352 GPU: Cap batch sizes at 1024 vertices, flush if exceeded Connor McLaughlin 2019-09-15 01:13:23 +1000
  • 4ca3b4b570 CPU: Fix alignment exception on register indirect branch Connor McLaughlin 2019-09-15 01:13:11 +1000
  • bea727bbe4 CPU: Fix BGEZAL with rs == ra Connor McLaughlin 2019-09-15 01:02:35 +1000
  • 273f010d17 GPU: Use degenerate triangles to split strips and batch them Connor McLaughlin 2019-09-15 00:17:43 +1000
  • 1c8e326624 GPU: Fix off-by-one in rectangle rendering Connor McLaughlin 2019-09-14 23:50:34 +1000
  • 77b15d156d System: Periodically flush GPU Connor McLaughlin 2019-09-14 23:49:55 +1000
  • 03bd135060 SDL: Make GL debug output less noisy in Release Connor McLaughlin 2019-09-14 23:49:21 +1000
  • b5d51f47cd GPU: Use texel fetch for creating page textures Connor McLaughlin 2019-09-14 23:18:39 +1000
  • 19d9322e67 GPU: Fix texture coordinates when rendering paletted textures Connor McLaughlin 2019-09-14 22:47:20 +1000
  • e40393fec4 GPU: Use scissor test for drawing area Connor McLaughlin 2019-09-14 21:54:58 +1000
  • 3d6b8e485e Interface: Support loading filenames on command line Connor McLaughlin 2019-09-14 21:54:46 +1000
  • 363d62e5c1 GPU: Various HW renderer fixes Connor McLaughlin 2019-09-14 21:34:55 +1000
  • d94d608ad7 GPU: Implment actual data copy of VRAM->CPU readbacks Connor McLaughlin 2019-09-14 20:48:15 +1000
  • f6ef3f7ba6 GPU: Saving/loading of VRAM Connor McLaughlin 2019-09-14 20:45:26 +1000
  • 2560efbebd Save state support Connor McLaughlin 2019-09-14 20:28:47 +1000
  • 851ef67814 GPU: Implement fill VRAM command Connor McLaughlin 2019-09-14 16:43:39 +1000
  • 46870c6a7a GPU: Implement basic rectangle rendering Connor McLaughlin 2019-09-14 16:27:24 +1000
  • f47d44c151 CPU: Implement break instruction Connor McLaughlin 2019-09-14 14:41:41 +1000
  • 32a36ef1bc CPU: Implement alignment (memory) exception Connor McLaughlin 2019-09-14 14:29:23 +1000
  • 0726095f00 CPU: Implement fixed dcache/scratchpad Connor McLaughlin 2019-09-14 13:52:57 +1000
  • ced3038e73 CPU: Implement sub instruction Connor McLaughlin 2019-09-14 13:39:36 +1000
  • 1afa02d475 CPU: Fix overflowed register written back in add instruction Connor McLaughlin 2019-09-14 13:33:29 +1000
  • 459db392e7 CPU: Add missing cop0 register reads Connor McLaughlin 2019-09-14 13:31:44 +1000
  • 9f36384752 System: Support sideloading EXE files via BIOS patch Connor McLaughlin 2019-09-14 13:22:05 +1000
  • ae43cc838b GPU: Partially implemented texture support Connor McLaughlin 2019-09-14 02:07:31 +1000
  • cfe361c1a6 GPU: Basic/hacky CPU->VRAM transfers Connor McLaughlin 2019-09-13 01:10:08 +1000
  • 52b619facc DMA: Implement block transfers Connor McLaughlin 2019-09-13 01:09:44 +1000
  • aea7a18ac2 GPU: More work on OpenGL renderer Connor McLaughlin 2019-09-13 00:18:13 +1000
  • 4706a906d5 GPU: Base work for hardware renderer Connor McLaughlin 2019-09-12 12:53:04 +1000
  • c0853de6a6 GPU: Partial render polygon command processing Connor McLaughlin 2019-09-11 16:04:31 +1000
  • 162f94337e DMA: Implement linked list mode Connor McLaughlin 2019-09-11 14:59:41 +1000
  • 27913cd20a Partial implementation of DMA controller and GPU stubs Connor McLaughlin 2019-09-11 14:01:19 +1000
  • 2149ab4d69 Initial commit Connor McLaughlin 2019-09-09 17:01:26 +1000