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SOPK?3-SOPK?14

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red-prig 2024-02-28 22:00:07 +03:00
parent ae897da738
commit 79c2fef847
5 changed files with 135 additions and 25 deletions
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19
kernel/ps4_scesocket.pas
View File

@ -5,10 +5,11 @@ unit ps4_scesocket;
interface
uses
ps4_libSceNet,
ps4_program,
Classes,
SysUtils;
sys_kernel,
ps4_libSceNet,
ps4_program,
Classes,
SysUtils;
type
pSceNetId=^SceNetId;
@ -114,7 +115,17 @@ function ps4_accept(s:SceNetId;
addr:pSceNetSockaddr;
paddrlen:pSceNetSocklen_t):Integer; SysV_ABI_CDecl;
begin
sleep(200);
Result:=0;
if (addr<>nil) then
begin
addr^:=default_addr;
end;
if (paddrlen<>nil) then
begin
paddrlen^:=SizeOf(SceNetSockaddr);
end;
Result:=_set_errno(EAGAIN);
end;
function ps4_sendto(s:SceNetId;

55
spirv/emit_sopk.pas
View File

@ -5,17 +5,20 @@ unit emit_SOPK;
interface
uses
sysutils,
ps4_pssl,
srType,
srReg,
emit_fetch;
sysutils,
spirv,
ps4_pssl,
srType,
srReg,
emit_fetch;
type
TEmit_SOPK=class(TEmitFetch)
procedure emit_SOPK;
procedure emit_S_MOVK_I32;
procedure emit_S_ADDK_I32;
procedure emit_S_CMPK_I32(OpId:DWORD);
procedure emit_S_CMPK_U32(OpId:DWORD);
end;
implementation
@ -51,11 +54,53 @@ begin
OpIAddExt(dst,car,src,imm);
end;
procedure TEmit_SOPK.emit_S_CMPK_I32(OpId:DWORD); //SCC = compareOp(sdst.s, signExtend(imm16.s))
Var
dst:PsrRegSlot;
src:PsrRegNode;
imm:PsrRegNode;
begin
dst:=get_scc;
src:=fetch_ssrc8(FSPI.SOPK.SDST,dtInt32);
imm:=NewReg_i(dtInt32,SignExtend16(FSPI.SOPK.SIMM));
OpCmpS(OpId,dst,src,imm);
end;
procedure TEmit_SOPK.emit_S_CMPK_U32(OpId:DWORD); //SCC = compareOp(sdst.u, imm16.u)
Var
dst:PsrRegSlot;
src:PsrRegNode;
imm:PsrRegNode;
begin
dst:=get_scc;
src:=fetch_ssrc8(FSPI.SOPK.SDST,dtUint32);
imm:=NewReg_i(dtUint32,FSPI.SOPK.SIMM);
OpCmpS(OpId,dst,src,imm);
end;
procedure TEmit_SOPK.emit_SOPK;
begin
Case FSPI.SOPK.OP of
S_CMPK_EQ_I32:emit_S_CMPK_I32(Op.OpIEqual);
S_CMPK_LG_I32:emit_S_CMPK_I32(Op.OpINotEqual);
S_CMPK_GT_I32:emit_S_CMPK_I32(Op.OpSGreaterThan);
S_CMPK_GE_I32:emit_S_CMPK_I32(Op.OpSGreaterThanEqual);
S_CMPK_LT_I32:emit_S_CMPK_I32(Op.OpSLessThan);
S_CMPK_LE_I32:emit_S_CMPK_I32(Op.OpSLessThanEqual);
S_CMPK_EQ_U32:emit_S_CMPK_U32(Op.OpIEqual);
S_CMPK_LG_U32:emit_S_CMPK_U32(Op.OpINotEqual);
S_CMPK_GT_U32:emit_S_CMPK_U32(Op.OpSGreaterThan);
S_CMPK_GE_U32:emit_S_CMPK_U32(Op.OpSGreaterThanEqual);
S_CMPK_LT_U32:emit_S_CMPK_U32(Op.OpSLessThan);
S_CMPK_LE_U32:emit_S_CMPK_U32(Op.OpSLessThanEqual);
S_MOVK_I32: emit_S_MOVK_I32;
S_ADDK_I32: emit_S_ADDK_I32;

20
spirv/emit_vop2.pas
View File

@ -20,8 +20,8 @@ type
procedure emit_V_AND_B32;
procedure emit_V_OR_B32;
procedure emit_V_XOR_B32;
procedure emit_V_SHNRM(OpId:DWORD;rtype:TsrDataType);
procedure emit_V_SHREV(OpId:DWORD;rtype:TsrDataType);
procedure emit_V_SH_NRM(OpId:DWORD;rtype:TsrDataType);
procedure emit_V_SH_REV(OpId:DWORD;rtype:TsrDataType);
procedure emit_V_ADD_I32;
procedure emit_V_SUB_I32;
procedure emit_V_SUBREV_I32;
@ -119,7 +119,7 @@ begin
OpBitwiseXor(dst,src[0],src[1]);
end;
procedure TEmit_VOP2.emit_V_SHNRM(OpId:DWORD;rtype:TsrDataType);
procedure TEmit_VOP2.emit_V_SH_NRM(OpId:DWORD;rtype:TsrDataType);
Var
dst:PsrRegSlot;
src:array[0..1] of PsrRegNode;
@ -135,7 +135,7 @@ begin
Op2(OpId,src[0]^.dtype,dst,src[0],src[1]);
end;
procedure TEmit_VOP2.emit_V_SHREV(OpId:DWORD;rtype:TsrDataType);
procedure TEmit_VOP2.emit_V_SH_REV(OpId:DWORD;rtype:TsrDataType);
Var
dst:PsrRegSlot;
src:array[0..1] of PsrRegNode;
@ -510,12 +510,12 @@ begin
V_OR_B32 : emit_V_OR_B32;
V_XOR_B32 : emit_V_XOR_B32;
V_LSHL_B32 : emit_V_SHNRM(Op.OpShiftLeftLogical ,dtUint32);
V_LSHLREV_B32: emit_V_SHREV(Op.OpShiftLeftLogical ,dtUint32);
V_LSHR_B32 : emit_V_SHNRM(Op.OpShiftRightLogical ,dtUint32);
V_LSHRREV_B32: emit_V_SHREV(Op.OpShiftRightLogical ,dtUint32);
V_ASHR_I32 : emit_V_SHNRM(Op.OpShiftRightArithmetic,dtInt32);
V_ASHRREV_I32: emit_V_SHREV(Op.OpShiftRightArithmetic,dtInt32);
V_LSHL_B32 : emit_V_SH_NRM(Op.OpShiftLeftLogical ,dtUint32);
V_LSHLREV_B32: emit_V_SH_REV(Op.OpShiftLeftLogical ,dtUint32);
V_LSHR_B32 : emit_V_SH_NRM(Op.OpShiftRightLogical ,dtUint32);
V_LSHRREV_B32: emit_V_SH_REV(Op.OpShiftRightLogical ,dtUint32);
V_ASHR_I32 : emit_V_SH_NRM(Op.OpShiftRightArithmetic,dtInt32);
V_ASHRREV_I32: emit_V_SH_REV(Op.OpShiftRightArithmetic,dtInt32);
V_ADD_I32 : emit_V_ADD_I32;
V_SUB_I32 : emit_V_SUB_I32;

63
spirv/emit_vop3.pas
View File

@ -34,9 +34,11 @@ type
procedure emit_V_CNDMASK_B32;
procedure emit_V_MUL_LEGACY_F32;
procedure emit_V2_F32(OpId:DWORD);
procedure emit_V_SUBREV_F32;
procedure emit_V2_REV_F32(OpId:DWORD);
procedure emit_V_CVT_PKRTZ_F16_F32;
procedure emit_V_MMX_F32(OpId:DWORD);
procedure emit_V_SH_NRM(OpId:DWORD;rtype:TsrDataType);
procedure emit_V_SH_REV(OpId:DWORD;rtype:TsrDataType);
procedure emit_V_MUL_LO(rtype:TsrDataType);
procedure emit_V_MUL_I32_I24;
procedure emit_V_MUL_U32_U24;
@ -283,7 +285,7 @@ begin
emit_dst_clamp_f(dst);
end;
procedure TEmit_VOP3.emit_V_SUBREV_F32;
procedure TEmit_VOP3.emit_V2_REV_F32(OpId:DWORD);
Var
dst:PsrRegSlot;
src:array[0..1] of PsrRegNode;
@ -296,7 +298,7 @@ begin
emit_src_abs_bit(@src,2);
emit_src_neg_bit(@src,2);
Op2(Op.OpFSub,dtFloat32,dst,src[1],src[0]);
Op2(OpId,dtFloat32,dst,src[1],src[0]);
emit_dst_omod_f(dst);
emit_dst_clamp_f(dst);
@ -340,6 +342,48 @@ begin
emit_dst_clamp_f(dst);
end;
procedure TEmit_VOP3.emit_V_SH_NRM(OpId:DWORD;rtype:TsrDataType);
Var
dst:PsrRegSlot;
src:array[0..1] of PsrRegNode;
begin
dst:=get_vdst8(FSPI.VOP3a.VDST);
Assert(FSPI.VOP3a.OMOD =0,'FSPI.VOP3a.OMOD');
Assert(FSPI.VOP3a.ABS =0,'FSPI.VOP3a.ABS');
Assert(FSPI.VOP3a.CLAMP=0,'FSPI.VOP3a.CLAMP');
Assert(FSPI.VOP3a.NEG =0,'FSPI.VOP3a.NEG');
src[0]:=fetch_ssrc9(FSPI.VOP3a.SRC0,rtype);
src[1]:=fetch_ssrc9(FSPI.VOP3a.SRC1,dtUInt32);
src[1]:=OpAndTo(src[1],31);
src[1]^.PrepType(ord(dtUInt32));
Op2(OpId,src[0]^.dtype,dst,src[0],src[1]);
end;
procedure TEmit_VOP3.emit_V_SH_REV(OpId:DWORD;rtype:TsrDataType);
Var
dst:PsrRegSlot;
src:array[0..1] of PsrRegNode;
begin
dst:=get_vdst8(FSPI.VOP3a.VDST);
Assert(FSPI.VOP3a.OMOD =0,'FSPI.VOP3a.OMOD');
Assert(FSPI.VOP3a.ABS =0,'FSPI.VOP3a.ABS');
Assert(FSPI.VOP3a.CLAMP=0,'FSPI.VOP3a.CLAMP');
Assert(FSPI.VOP3a.NEG =0,'FSPI.VOP3a.NEG');
src[0]:=fetch_ssrc9(FSPI.VOP3a.SRC0,dtUInt32);
src[1]:=fetch_ssrc9(FSPI.VOP3a.SRC1,rtype);
src[0]:=OpAndTo(src[0],31);
src[0]^.PrepType(ord(dtUInt32));
Op2(OpId,src[1]^.dtype,dst,src[1],src[0]);
end;
procedure TEmit_VOP3.emit_V_MUL_LO(rtype:TsrDataType);
Var
dst:PsrRegSlot;
@ -1220,9 +1264,16 @@ begin
256+V_CNDMASK_B32: emit_V_CNDMASK_B32;
256+V_ADD_F32: emit_V2_F32(Op.OpFAdd);
256+V_SUB_F32: emit_V2_F32(Op.OpFSub);
256+V_SUBREV_F32: emit_V_SUBREV_F32;
256+V_ADD_F32 : emit_V2_F32(Op.OpFAdd);
256+V_SUB_F32 : emit_V2_F32(Op.OpFSub);
256+V_SUBREV_F32 : emit_V2_REV_F32(Op.OpFSub);
256+V_LSHL_B32 : emit_V_SH_NRM(Op.OpShiftLeftLogical ,dtUint32);
256+V_LSHLREV_B32: emit_V_SH_REV(Op.OpShiftLeftLogical ,dtUint32);
256+V_LSHR_B32 : emit_V_SH_NRM(Op.OpShiftRightLogical ,dtUint32);
256+V_LSHRREV_B32: emit_V_SH_REV(Op.OpShiftRightLogical ,dtUint32);
256+V_ASHR_I32 : emit_V_SH_NRM(Op.OpShiftRightArithmetic,dtInt32);
256+V_ASHRREV_I32: emit_V_SH_REV(Op.OpShiftRightArithmetic,dtInt32);
256+V_CVT_PKRTZ_F16_F32: emit_V_CVT_PKRTZ_F16_F32;

3
src/ps4_libscenet.pas
View File

@ -16,6 +16,7 @@ const
SCE_NET_EINVAL =22;
SCE_NET_ENOSPC =28;
SCE_NET_EWOULDBLOCK =35;
SCE_NET_EAFNOSUPPORT=47;
SCE_NET_EHOSTUNREACH=65;
@ -305,6 +306,7 @@ function ps4_sceNetAccept(s:Integer;
addr:pSceNetSockaddr;
paddrlen:pSceNetSocklen_t):Integer; SysV_ABI_CDecl;
begin
sleep(200);
Result:=0;
if (addr<>nil) then
begin
@ -314,6 +316,7 @@ begin
begin
paddrlen^:=SizeOf(SceNetSockaddr);
end;
Result:=_set_net_errno(SCE_NET_EWOULDBLOCK)
end;
function ps4_sceNetRecv(s:Integer;