mirror of
https://github.com/red-prig/fpPS4.git
synced 2024-11-26 16:10:25 +00:00
Update shader recompiler
This commit is contained in:
parent
47d666c76c
commit
8e6c7c3d0b
@ -788,12 +788,15 @@ const
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IMAGE_LOAD_PCK_SGN =$03;
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IMAGE_LOAD_MIP_PCK =$04;
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IMAGE_LOAD_MIP_PCK_SGN=$05;
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IMAGE_STORE =$08;
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IMAGE_STORE_MIP =$09;
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IMAGE_STORE_PCK =$0A;
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IMAGE_STORE_MIP_PCK =$0B;
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IMAGE_GET_RESINFO =$0E;
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IMAGE_ATOMIC_SWAP =$0F;
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IMAGE_STORE_PCK =$0a;
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IMAGE_STORE_MIP_PCK =$0b;
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IMAGE_GET_RESINFO =$0e;
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IMAGE_ATOMIC_SWAP =$0f;
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IMAGE_ATOMIC_CMPSWAP =$10;
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IMAGE_ATOMIC_ADD =$11;
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IMAGE_ATOMIC_SUB =$12;
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@ -803,12 +806,13 @@ const
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IMAGE_ATOMIC_UMAX =$17;
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IMAGE_ATOMIC_AND =$18;
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IMAGE_ATOMIC_OR =$19;
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IMAGE_ATOMIC_XOR =$1A;
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IMAGE_ATOMIC_INC =$1B;
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IMAGE_ATOMIC_DEC =$1C;
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IMAGE_ATOMIC_FCMPSWAP =$1D;
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IMAGE_ATOMIC_FMIN =$1E;
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IMAGE_ATOMIC_FMAX =$1F;
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IMAGE_ATOMIC_XOR =$1a;
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IMAGE_ATOMIC_INC =$1b;
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IMAGE_ATOMIC_DEC =$1c;
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IMAGE_ATOMIC_FCMPSWAP =$1d;
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IMAGE_ATOMIC_FMIN =$1e;
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IMAGE_ATOMIC_FMAX =$1f;
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IMAGE_SAMPLE =$20;
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IMAGE_SAMPLE_CL =$21;
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IMAGE_SAMPLE_D =$22;
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@ -819,12 +823,12 @@ const
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IMAGE_SAMPLE_LZ =$27;
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IMAGE_SAMPLE_C =$28;
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IMAGE_SAMPLE_C_CL =$29;
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IMAGE_SAMPLE_C_D =$2A;
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IMAGE_SAMPLE_C_D_CL =$2B;
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IMAGE_SAMPLE_C_L =$2C;
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IMAGE_SAMPLE_C_B =$2D;
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IMAGE_SAMPLE_C_B_CL =$2E;
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IMAGE_SAMPLE_C_LZ =$2F;
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IMAGE_SAMPLE_C_D =$2a;
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IMAGE_SAMPLE_C_D_CL =$2b;
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IMAGE_SAMPLE_C_L =$2c;
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IMAGE_SAMPLE_C_B =$2d;
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IMAGE_SAMPLE_C_B_CL =$2e;
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IMAGE_SAMPLE_C_LZ =$2f;
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IMAGE_SAMPLE_O =$30;
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IMAGE_SAMPLE_CL_O =$31;
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IMAGE_SAMPLE_D_O =$32;
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@ -835,24 +839,25 @@ const
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IMAGE_SAMPLE_LZ_O =$37;
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IMAGE_SAMPLE_C_O =$38;
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IMAGE_SAMPLE_C_CL_O =$39;
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IMAGE_SAMPLE_C_D_O =$3A;
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IMAGE_SAMPLE_C_D_CL_O =$3B;
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IMAGE_SAMPLE_C_L_O =$3C;
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IMAGE_SAMPLE_C_B_O =$3D;
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IMAGE_SAMPLE_C_B_CL_O =$3E;
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IMAGE_SAMPLE_C_LZ_O =$3F;
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IMAGE_SAMPLE_C_D_O =$3a;
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IMAGE_SAMPLE_C_D_CL_O =$3b;
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IMAGE_SAMPLE_C_L_O =$3c;
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IMAGE_SAMPLE_C_B_O =$3d;
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IMAGE_SAMPLE_C_B_CL_O =$3e;
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IMAGE_SAMPLE_C_LZ_O =$3f;
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IMAGE_GATHER4 =$40;
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IMAGE_GATHER4_CL =$41;
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IMAGE_GATHER4_L =$42;
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IMAGE_GATHER4_B =$43;
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IMAGE_GATHER4_B_CL =$44;
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IMAGE_GATHER4_LZ =$45;
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IMAGE_GATHER4_C =$46;
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IMAGE_GATHER4_C_CL =$47;
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IMAGE_GATHER4_C_L =$4C;
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IMAGE_GATHER4_C_B =$4D;
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IMAGE_GATHER4_C_B_CL =$4E;
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IMAGE_GATHER4_C_LZ =$4F;
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IMAGE_GATHER4_L =$44;
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IMAGE_GATHER4_B =$45;
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IMAGE_GATHER4_B_CL =$46;
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IMAGE_GATHER4_LZ =$47;
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IMAGE_GATHER4_C =$48;
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IMAGE_GATHER4_C_CL =$49;
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IMAGE_GATHER4_C_L =$4c;
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IMAGE_GATHER4_C_B =$4d;
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IMAGE_GATHER4_C_B_CL =$4e;
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IMAGE_GATHER4_C_LZ =$4f;
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IMAGE_GATHER4_O =$50;
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IMAGE_GATHER4_CL_O =$51;
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IMAGE_GATHER4_L_O =$54;
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@ -861,19 +866,22 @@ const
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IMAGE_GATHER4_LZ_O =$57;
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IMAGE_GATHER4_C_O =$58;
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IMAGE_GATHER4_C_CL_O =$59;
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IMAGE_GATHER4_C_L_O =$5C;
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IMAGE_GATHER4_C_B_O =$5D;
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IMAGE_GATHER4_C_B_CL_O=$5E;
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IMAGE_GATHER4_C_LZ_O =$5F;
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IMAGE_GATHER4_C_L_O =$5c;
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IMAGE_GATHER4_C_B_O =$5d;
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IMAGE_GATHER4_C_B_CL_O=$5e;
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IMAGE_GATHER4_C_LZ_O =$5f;
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IMAGE_GET_LOD =$60;
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IMAGE_SAMPLE_CD =$68;
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IMAGE_SAMPLE_CD_CL =$69;
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IMAGE_SAMPLE_C_CD =$6A;
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IMAGE_SAMPLE_C_CD_CL =$6B;
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IMAGE_SAMPLE_CD_O =$6C;
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IMAGE_SAMPLE_CD_CL_O =$6D;
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IMAGE_SAMPLE_C_CD_O =$6E;
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IMAGE_SAMPLE_C_CD_CL_O=$6F;
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IMAGE_SAMPLE_C_CD =$6a;
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IMAGE_SAMPLE_C_CD_CL =$6b;
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IMAGE_SAMPLE_CD_O =$6c;
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IMAGE_SAMPLE_CD_CL_O =$6d;
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IMAGE_SAMPLE_C_CD_O =$6e;
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IMAGE_SAMPLE_C_CD_CL_O=$6f;
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//DS
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DS_ADD_U32 =$00;
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@ -35,9 +35,21 @@ type
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Constructor Create;
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procedure SetUserData(pData:Pointer);
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Procedure InitVs(RSRC2:TSPI_SHADER_PGM_RSRC2_VS;instance:Byte);
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Procedure InitPs(RSRC2:TSPI_SHADER_PGM_RSRC2_PS;ENA:TSPI_PS_INPUT_ENA);
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Procedure InitCs(RSRC2:TCOMPUTE_PGM_RSRC2;NTX:TCOMPUTE_NUM_THREAD_X;NTY:TCOMPUTE_NUM_THREAD_Y;NTZ:TCOMPUTE_NUM_THREAD_Z);
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procedure FillGPR(VGPRS,USER_SGPR,SGPRS:Byte);
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Procedure InitVs(RSRC1:TSPI_SHADER_PGM_RSRC1_VS;
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RSRC2:TSPI_SHADER_PGM_RSRC2_VS;
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instance:Byte);
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Procedure InitPs(RSRC1:TSPI_SHADER_PGM_RSRC1_PS;
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RSRC2:TSPI_SHADER_PGM_RSRC2_PS;
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ENA:TSPI_PS_INPUT_ENA);
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Procedure InitCs(RSRC1:TCOMPUTE_PGM_RSRC1;
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RSRC2:TCOMPUTE_PGM_RSRC2;
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NTX:TCOMPUTE_NUM_THREAD_X;
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NTY:TCOMPUTE_NUM_THREAD_Y;
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NTZ:TCOMPUTE_NUM_THREAD_Z);
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procedure emit_spi; override;
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@ -127,7 +139,32 @@ begin
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DataLayoutList.SetUserData(pData);
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end;
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Procedure TSprvEmit.InitVs(RSRC2:TSPI_SHADER_PGM_RSRC2_VS;instance:Byte);
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procedure TSprvEmit.FillGPR(VGPRS,USER_SGPR,SGPRS:Byte);
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var
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p:Byte;
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begin
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if (VGPRS<>0) then
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For p:=0 to VGPRS-1 do
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begin
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if (RegsStory.VGRP[p].current=nil) then
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begin
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SetConst_i(@RegsStory.VGRP[p],dtUnknow,0);
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end;
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end;
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if (SGPRS<>0) then
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For p:=USER_SGPR to (SGPRS+USER_SGPR)-1 do
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begin
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if (RegsStory.SGRP[p].current=nil) then
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begin
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SetConst_i(@RegsStory.SGRP[p],dtUnknow,0);
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end;
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end;
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end;
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Procedure TSprvEmit.InitVs(RSRC1:TSPI_SHADER_PGM_RSRC1_VS;
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RSRC2:TSPI_SHADER_PGM_RSRC2_VS;
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instance:Byte);
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var
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p:Byte;
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begin
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@ -232,11 +269,14 @@ begin
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AddInput(@RegsStory.VGRP[p],dtUint32,itVInstance,0);
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end;
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AddCapability(Capability.Shader);
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FillGPR(RSRC1.VGPRS,RSRC2.USER_SGPR,RSRC1.SGPRS);
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AddCapability(Capability.Shader);
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end;
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Procedure TSprvEmit.InitPs(RSRC2:TSPI_SHADER_PGM_RSRC2_PS;ENA:TSPI_PS_INPUT_ENA);
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Procedure TSprvEmit.InitPs(RSRC1:TSPI_SHADER_PGM_RSRC1_PS;
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RSRC2:TSPI_SHADER_PGM_RSRC2_PS;
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ENA:TSPI_PS_INPUT_ENA);
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var
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p:Byte;
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begin
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@ -385,11 +425,16 @@ begin
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//Per-pixel fixed point position Y[31:16], X[15:0]
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end;
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AddCapability(Capability.Shader);
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FillGPR(RSRC1.VGPRS,RSRC2.USER_SGPR,RSRC1.SGPRS);
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AddCapability(Capability.Shader);
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end;
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Procedure TSprvEmit.InitCs(RSRC2:TCOMPUTE_PGM_RSRC2;NTX:TCOMPUTE_NUM_THREAD_X;NTY:TCOMPUTE_NUM_THREAD_Y;NTZ:TCOMPUTE_NUM_THREAD_Z);
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Procedure TSprvEmit.InitCs(RSRC1:TCOMPUTE_PGM_RSRC1;
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RSRC2:TCOMPUTE_PGM_RSRC2;
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NTX:TCOMPUTE_NUM_THREAD_X;
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NTY:TCOMPUTE_NUM_THREAD_Y;
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NTZ:TCOMPUTE_NUM_THREAD_Z);
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var
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p:Byte;
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begin
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@ -472,6 +517,8 @@ begin
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if (FLocalSize.y=0) then FLocalSize.y:=1;
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if (FLocalSize.z=0) then FLocalSize.z:=1;
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FillGPR(RSRC1.VGPRS,RSRC2.USER_SGPR,RSRC1.SGPRS);
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AddCapability(Capability.Shader);
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end;
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@ -18,15 +18,28 @@ uses
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emit_fetch;
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type
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TsrImageMods=Set Of (imMinLod,imGrad,imLod,imBiasLod,imZeroLod,imDref,imOffset);
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TImgSampleParam=object
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roffset:DWORD;
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mods:TsrImageMods;
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img_op:Integer;
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coord,pcf,bias,lod,min_lod,offset:PsrRegNode;
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end;
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TEmit_MIMG=class(TEmitFetch)
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procedure emit_MIMG;
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procedure DistribDmask(dst:PsrRegNode;info:PsrImageInfo);
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procedure DistribDmask(DMASK:Byte;dst:PsrRegNode;info:PsrImageInfo);
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function GatherDmask(telem:TsrDataType):PsrRegNode;
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Function GatherCoord_f(var offset:DWORD;dim_id:Byte):PsrRegNode;
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Function GatherCoord_u(var offset:DWORD;dim_id:Byte):PsrRegNode;
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Function Gather_value(var offset:DWORD;rtype:TsrDataType):PsrRegNode;
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Function Gather_packed_offset(var offset:DWORD;dim:Byte):PsrRegNode;
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procedure Gather_sample_param(var p:TImgSampleParam;info:PsrImageInfo);
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procedure add_sample_op(var p:TImgSampleParam;node:PSpirvOp);
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procedure emit_image_sample(Tgrp:PsrNode;info:PsrImageInfo);
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procedure emit_image_sample_gather(Tgrp:PsrNode;info:PsrImageInfo);
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procedure emit_image_load(Tgrp:PsrNode;info:PsrImageInfo);
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procedure emit_image_store(Tgrp:PsrNode;info:PsrImageInfo);
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end;
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@ -374,9 +387,6 @@ begin
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Result.tinfo.Format :=GetImageFormat(PT);
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end;
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type
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TsrImageMods=Set Of (imMinLod,imGrad,imLod,imBiasLod,imZeroLod,imDref,imOffset);
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function GetImageMods(OP:Byte):TsrImageMods;
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begin
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Case OP of
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@ -449,14 +459,40 @@ begin
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end;
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end;
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procedure TEmit_MIMG.DistribDmask(dst:PsrRegNode;info:PsrImageInfo); //result
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function GetImgOpStr(i:Integer):RawByteString;
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procedure t(o:Integer;const v:RawByteString); inline;
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begin
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if ((o and i)<>0) then
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begin
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if (Result<>'') then
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begin
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Result:=Result+'|'+v;
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end else
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begin
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Result:=v;
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end;
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end;
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end;
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begin
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Result:='';
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t(ImageOperands.Bias ,'Bias');
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t(ImageOperands.Lod ,'Lod');
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t(ImageOperands.Grad ,'Grad');
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t(ImageOperands.ConstOffset ,'ConstOffset');
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t(ImageOperands.Sample ,'Sample');
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t(ImageOperands.MinLod ,'MinLod');
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end;
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procedure TEmit_MIMG.DistribDmask(DMASK:Byte;dst:PsrRegNode;info:PsrImageInfo); //result
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var
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pSlot:PsrRegSlot;
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i,d:Byte;
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begin
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d:=0;
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For i:=0 to 3 do
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if Byte(FSPI.MIMG.DMASK).TestBit(i) then
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if DMASK.TestBit(i) then
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begin
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pSlot:=get_vdst8(FSPI.MIMG.VDATA+d);
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Inc(d);
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@ -630,6 +666,93 @@ begin
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end;
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procedure TEmit_MIMG.Gather_sample_param(var p:TImgSampleParam;info:PsrImageInfo);
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begin
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p.roffset:=0;
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p.mods:=GetImageMods(FSPI.MIMG.OP);
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p.img_op:=0;
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//gather
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if (imOffset in p.mods) then
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begin
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p.offset:=Gather_packed_offset(p.roffset,GetDimCount(info^.tinfo.Dim));
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p.img_op:=p.img_op or ImageOperands.ConstOffset;
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end;
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if (imBiasLod in p.mods) then
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begin
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p.bias:=Gather_value(p.roffset,dtFloat32);
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p.img_op:=p.img_op or ImageOperands.Bias;
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end;
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if (imDref in p.mods) then
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begin
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p.pcf:=Gather_value(p.roffset,dtFloat32);
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end;
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if (imGrad in p.mods) then
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begin
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Assert(false,'TODO imGrad');
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end;
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p.coord:=GatherCoord_f(p.roffset,info^.tinfo.Dim);
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if (imLod in p.mods) then
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begin
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p.lod:=Gather_value(p.roffset,dtFloat32);
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p.img_op:=p.img_op or ImageOperands.Lod;
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end else
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if (imZeroLod in p.mods) then
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begin
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p.lod:=NewReg_s(dtFloat32,0);
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p.img_op:=p.img_op or ImageOperands.Lod;
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end;
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if (imMinLod in p.mods) then
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begin
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p.min_lod:=Gather_value(p.roffset,dtFloat32);
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p.img_op:=p.img_op or ImageOperands.MinLod;
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end;
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//gather
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end;
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procedure TEmit_MIMG.add_sample_op(var p:TImgSampleParam;node:PSpirvOp);
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begin
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//ImageOperands
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if (p.img_op<>0) then
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begin
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node^.AddLiteral(p.img_op,GetImgOpStr(p.img_op));
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if ((p.img_op and ImageOperands.Bias)<>0) then
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begin
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node^.AddParam(p.bias);
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end;
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if ((p.img_op and ImageOperands.Lod)<>0) then
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begin
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node^.AddParam(p.lod);
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end;
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if ((p.img_op and ImageOperands.Grad)<>0) then
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begin
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Assert(false,'TODO imGrad');
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end;
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if ((p.img_op and ImageOperands.ConstOffset)<>0) then
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begin
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node^.AddParam(p.offset);
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end;
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if ((p.img_op and ImageOperands.MinLod)<>0) then
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begin
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node^.AddParam(p.min_lod);
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AddCapability(Capability.MinLod);
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end;
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end;
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//ImageOperands
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end;
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procedure TEmit_MIMG.emit_image_sample(Tgrp:PsrNode;info:PsrImageInfo);
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var
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src:array[0..3] of PsrRegSlot;
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@ -637,12 +760,11 @@ var
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pLayout:PsrDataLayout;
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Sgrp:PsrNode;
|
||||
|
||||
dst,cmb,coord,pcf,lod,offset:PsrRegNode;
|
||||
dst,cmb:PsrRegNode;
|
||||
|
||||
roffset:DWORD;
|
||||
param:TImgSampleParam;
|
||||
|
||||
node:PSpirvOp;
|
||||
|
||||
begin
|
||||
if not get_srsrc(FSPI.MIMG.SSAMP,4,@src) then Assert(false);
|
||||
|
||||
@ -659,74 +781,101 @@ begin
|
||||
dst:=NewReg(info^.dtype.AsVector(4));
|
||||
end;
|
||||
|
||||
roffset:=0;
|
||||
//gather
|
||||
param:=Default(TImgSampleParam);
|
||||
Gather_sample_param(param,info);
|
||||
//gather
|
||||
|
||||
Case FSPI.MIMG.OP of
|
||||
IMAGE_SAMPLE:
|
||||
begin
|
||||
coord:=GatherCoord_f(roffset,info^.tinfo.Dim);
|
||||
//OpImage
|
||||
|
||||
if (FExecutionModel=ExecutionModel.Fragment) then
|
||||
begin
|
||||
node:=OpImageSampleImplicitLod(line,cmb,dst,coord);
|
||||
end else
|
||||
begin
|
||||
node:=OpImageSampleExplicitLod(line,cmb,dst,coord);
|
||||
end;
|
||||
if (imDref in param.mods) then
|
||||
begin
|
||||
if (FExecutionModel=ExecutionModel.Fragment) and
|
||||
((param.img_op and ImageOperands.Lod)=0) then
|
||||
begin
|
||||
node:=OpImageSampleDrefImplicitLod(line,cmb,dst,param.coord,param.pcf);
|
||||
end else
|
||||
begin
|
||||
node:=OpImageSampleDrefExplicitLod(line,cmb,dst,param.coord,param.pcf);
|
||||
end;
|
||||
end else
|
||||
begin
|
||||
if (FExecutionModel=ExecutionModel.Fragment) and
|
||||
((param.img_op and ImageOperands.Lod)=0) then
|
||||
begin
|
||||
node:=OpImageSampleImplicitLod(line,cmb,dst,param.coord);
|
||||
end else
|
||||
begin
|
||||
node:=OpImageSampleExplicitLod(line,cmb,dst,param.coord);
|
||||
end;
|
||||
end;
|
||||
//OpImage
|
||||
|
||||
end;
|
||||
//ImageOperands
|
||||
add_sample_op(param,node);
|
||||
//ImageOperands
|
||||
|
||||
IMAGE_SAMPLE_LZ:
|
||||
begin
|
||||
coord:=GatherCoord_f(roffset,info^.tinfo.Dim);
|
||||
DistribDmask(FSPI.MIMG.DMASK,dst,info);
|
||||
end;
|
||||
|
||||
node:=OpImageSampleExplicitLod(line,cmb,dst,coord);
|
||||
procedure TEmit_MIMG.emit_image_sample_gather(Tgrp:PsrNode;info:PsrImageInfo);
|
||||
var
|
||||
src:array[0..3] of PsrRegSlot;
|
||||
|
||||
node^.AddLiteral(ImageOperands.Lod,'Lod');
|
||||
pLayout:PsrDataLayout;
|
||||
Sgrp:PsrNode;
|
||||
|
||||
//0
|
||||
lod:=NewReg_s(dtFloat32,0);
|
||||
node^.AddParam(lod);
|
||||
end;
|
||||
dst,cmb:PsrRegNode;
|
||||
|
||||
IMAGE_SAMPLE_LZ_O:
|
||||
begin
|
||||
offset:=Gather_packed_offset(roffset,GetDimCount(info^.tinfo.Dim));
|
||||
param:TImgSampleParam;
|
||||
id:Byte;
|
||||
|
||||
coord:=GatherCoord_f(roffset,info^.tinfo.Dim);
|
||||
node:PSpirvOp;
|
||||
begin
|
||||
if not get_srsrc(FSPI.MIMG.SSAMP,4,@src) then Assert(false);
|
||||
|
||||
node:=OpImageSampleExplicitLod(line,cmb,dst,coord);
|
||||
pLayout:=GroupingSharp(src,rtSSharp4);
|
||||
Sgrp:=FetchSampler(pLayout);
|
||||
|
||||
node^.AddLiteral(ImageOperands.Lod or ImageOperands.ConstOffset,'Lod|ConstOffset');
|
||||
cmb:=OpSampledImage(line,Tgrp,Sgrp,info^.dtype,info^.tinfo);
|
||||
|
||||
//0
|
||||
lod:=NewReg_s(dtFloat32,0);
|
||||
node^.AddParam(lod);
|
||||
|
||||
//1
|
||||
node^.AddParam(offset);
|
||||
end;
|
||||
|
||||
IMAGE_SAMPLE_C_LZ:
|
||||
begin
|
||||
pcf:=Gather_value(roffset,dtFloat32);
|
||||
|
||||
coord:=GatherCoord_f(roffset,info^.tinfo.Dim);
|
||||
|
||||
node:=OpImageSampleDrefExplicitLod(line,cmb,dst,coord,pcf);
|
||||
|
||||
node^.AddLiteral(ImageOperands.Lod,'Lod');
|
||||
|
||||
//0
|
||||
lod:=NewReg_s(dtFloat32,0);
|
||||
node^.AddParam(lod);
|
||||
end;
|
||||
|
||||
else
|
||||
Assert(false,'MIMG?'+IntToStr(FSPI.MIMG.OP));
|
||||
if (info^.tinfo.Depth=1) then
|
||||
begin
|
||||
dst:=NewReg(info^.dtype);
|
||||
end else
|
||||
begin
|
||||
dst:=NewReg(info^.dtype.AsVector(4));
|
||||
end;
|
||||
|
||||
DistribDmask(dst,info);
|
||||
//gather
|
||||
param:=Default(TImgSampleParam);
|
||||
Gather_sample_param(param,info);
|
||||
//gather
|
||||
|
||||
id:=BsrByte(FSPI.MIMG.DMASK);
|
||||
//OpImage
|
||||
if (imDref in param.mods) then
|
||||
begin
|
||||
Assert(id=0,'gather pcf with non red component');
|
||||
node:=OpImageDrefGather(line,cmb,dst,param.coord,param.pcf);
|
||||
end else
|
||||
begin
|
||||
node:=OpImageGather(line,cmb,dst,param.coord,id);
|
||||
end;
|
||||
//OpImage
|
||||
|
||||
//OpExtension "SPV_AMD_texture_gather_bias_lod"
|
||||
//Capability.ImageGatherBiasLodAMD
|
||||
//VK_AMD_texture_gather_bias_lod
|
||||
begin
|
||||
param.img_op:=param.img_op and (not (ImageOperands.Bias or ImageOperands.Lod))
|
||||
end;
|
||||
|
||||
//ImageOperands
|
||||
add_sample_op(param,node);
|
||||
//ImageOperands
|
||||
|
||||
DistribDmask(15,dst,info);
|
||||
end;
|
||||
|
||||
procedure TEmit_MIMG.emit_image_load(Tgrp:PsrNode;info:PsrImageInfo);
|
||||
@ -750,8 +899,7 @@ begin
|
||||
|
||||
if (info^.tinfo.MS<>0) then //fragid T# 2D MSAA
|
||||
begin
|
||||
smp:=fetch_vsrc8(FSPI.MIMG.VADDR+roffset,dtUint32);
|
||||
Inc(roffset);
|
||||
smp:=Gather_value(roffset,dtUint32);
|
||||
|
||||
node^.AddLiteral(ImageOperands.Sample,'Sample');
|
||||
node^.AddParam(smp);
|
||||
@ -762,8 +910,7 @@ begin
|
||||
coord:=GatherCoord_u(roffset,info^.tinfo.Dim);
|
||||
node:=OpImageFetch(line,Tgrp,dst,coord);
|
||||
|
||||
lod:=fetch_vsrc8(FSPI.MIMG.VADDR+roffset,dtUint32);
|
||||
Inc(roffset);
|
||||
lod:=Gather_value(roffset,dtUint32);
|
||||
|
||||
node^.AddLiteral(ImageOperands.Lod,'Lod');
|
||||
node^.AddParam(lod);
|
||||
@ -772,7 +919,7 @@ begin
|
||||
Assert(false,'MIMG?'+IntToStr(FSPI.MIMG.OP));
|
||||
end;
|
||||
|
||||
DistribDmask(dst,info);
|
||||
DistribDmask(FSPI.MIMG.DMASK,dst,info);
|
||||
end;
|
||||
|
||||
procedure TEmit_MIMG.emit_image_store(Tgrp:PsrNode;info:PsrImageInfo);
|
||||
@ -795,8 +942,7 @@ begin
|
||||
|
||||
if (info^.tinfo.MS<>0) then //fragid T# 2D MSAA
|
||||
begin
|
||||
smp:=fetch_vsrc8(FSPI.MIMG.VADDR+roffset,dtUint32);
|
||||
Inc(roffset);
|
||||
smp:=Gather_value(roffset,dtUint32);
|
||||
|
||||
node^.AddLiteral(ImageOperands.Sample,'Sample');
|
||||
node^.AddParam(smp);
|
||||
@ -807,8 +953,7 @@ begin
|
||||
coord:=GatherCoord_u(roffset,info^.tinfo.Dim);
|
||||
node:=OpImageWrite(line,Tgrp,coord,dst);
|
||||
|
||||
lod:=fetch_vsrc8(FSPI.MIMG.VADDR+roffset,dtUint32);
|
||||
Inc(roffset);
|
||||
lod:=Gather_value(roffset,dtUint32);
|
||||
|
||||
node^.AddLiteral(ImageOperands.Lod,'Lod');
|
||||
node^.AddParam(lod);
|
||||
@ -862,6 +1007,16 @@ begin
|
||||
emit_image_sample(Tgrp,@info);
|
||||
end;
|
||||
|
||||
IMAGE_GATHER4..IMAGE_GATHER4_C_LZ_O: //sampled gather
|
||||
begin
|
||||
Assert(FSPI.MIMG.UNRM=0,'FSPI.MIMG.UNRM');
|
||||
|
||||
info.tinfo.Sampled:=1;
|
||||
Tgrp:=FetchImage(pLayout,info.dtype,info.tinfo);
|
||||
|
||||
emit_image_sample_gather(Tgrp,@info);
|
||||
end;
|
||||
|
||||
IMAGE_LOAD..IMAGE_LOAD_MIP_PCK_SGN: //loaded
|
||||
begin
|
||||
info.tinfo.Sampled:=1;
|
||||
|
@ -136,14 +136,16 @@ type
|
||||
procedure OpLogicalAnd(dst:PsrRegSlot;src0,src1:PsrRegNode);
|
||||
//
|
||||
function OpNotTo(src:PsrRegNode;ppLine:PPspirvOp=nil):PsrRegNode;
|
||||
function OpBitwiseOrTo(src0,src1:PsrRegNode;ppLine:PPspirvOp=nil):PsrRegNode;
|
||||
function OpBitwiseAndTo(src0,src1:PsrRegNode;ppLine:PPspirvOp=nil):PsrRegNode;
|
||||
function OpBitwiseAndTo(src0:PsrRegNode;src1:QWORD;ppLine:PPspirvOp=nil):PsrRegNode;
|
||||
function OpOrTo(src0,src1:PsrRegNode;ppLine:PPspirvOp=nil):PsrRegNode;
|
||||
function OpAndTo(src0,src1:PsrRegNode;ppLine:PPspirvOp=nil):PsrRegNode;
|
||||
function OpAndTo(src0:PsrRegNode;src1:QWORD;ppLine:PPspirvOp=nil):PsrRegNode;
|
||||
//
|
||||
function OpImageSampleImplicitLod(pLine:PspirvOp;img:PsrNode;dst,coord:PsrRegNode):PSpirvOp;
|
||||
function OpImageSampleExplicitLod(pLine:PspirvOp;img:PsrNode;dst,coord:PsrRegNode):PSpirvOp;
|
||||
function OpImageSampleDrefImplicitLod(pLine:PspirvOp;img:PsrNode;dst,coord,pcf:PsrRegNode):PSpirvOp;
|
||||
function OpImageSampleDrefExplicitLod(pLine:PspirvOp;img:PsrNode;dst,coord,pcf:PsrRegNode):PSpirvOp;
|
||||
function OpImageGather(pLine:PspirvOp;img:PsrNode;dst,coord:PsrRegNode;id:Byte):PSpirvOp;
|
||||
function OpImageDrefGather(pLine:PspirvOp;img:PsrNode;dst,coord,pcf:PsrRegNode):PSpirvOp;
|
||||
function OpImageFetch(pLine:PspirvOp;Tgrp:PsrNode;dst,coord:PsrRegNode):PSpirvOp;
|
||||
function OpImageRead(pLine:PspirvOp;Tgrp:PsrNode;dst,idx:PsrRegNode):PspirvOp;
|
||||
function OpImageWrite(pLine:PspirvOp;Tgrp:PsrNode;idx,src:PsrRegNode):PspirvOp;
|
||||
@ -1180,22 +1182,22 @@ begin
|
||||
_set_line(ppLine,_Op1(_get_line(ppLine),Op.OpNot,Result,src)); //post type
|
||||
end;
|
||||
|
||||
function TEmitOp.OpBitwiseOrTo(src0,src1:PsrRegNode;ppLine:PPspirvOp=nil):PsrRegNode;
|
||||
function TEmitOp.OpOrTo(src0,src1:PsrRegNode;ppLine:PPspirvOp=nil):PsrRegNode;
|
||||
begin
|
||||
Result:=NewReg(dtUnknow);
|
||||
_set_line(ppLine,_Op2(_get_line(ppLine),Op.OpBitwiseOr,Result,src0,src1)); //post type
|
||||
end;
|
||||
|
||||
function TEmitOp.OpBitwiseAndTo(src0,src1:PsrRegNode;ppLine:PPspirvOp=nil):PsrRegNode;
|
||||
function TEmitOp.OpAndTo(src0,src1:PsrRegNode;ppLine:PPspirvOp=nil):PsrRegNode;
|
||||
begin
|
||||
Result:=NewReg(dtUnknow);
|
||||
_set_line(ppLine,_Op2(_get_line(ppLine),Op.OpBitwiseAnd,Result,src0,src1)); //post type
|
||||
end;
|
||||
|
||||
function TEmitOp.OpBitwiseAndTo(src0:PsrRegNode;src1:QWORD;ppLine:PPspirvOp=nil):PsrRegNode;
|
||||
function TEmitOp.OpAndTo(src0:PsrRegNode;src1:QWORD;ppLine:PPspirvOp=nil):PsrRegNode;
|
||||
begin
|
||||
if (src0=nil) then Exit(src0);
|
||||
Result:=OpBitwiseAndTo(src0,NewReg_q(src0^.dtype,src1,ppLine),ppLine);
|
||||
Result:=OpAndTo(src0,NewReg_q(src0^.dtype,src1,ppLine),ppLine);
|
||||
end;
|
||||
|
||||
//
|
||||
@ -1265,6 +1267,49 @@ begin
|
||||
Result:=node;
|
||||
end;
|
||||
|
||||
function TEmitOp.OpImageGather(pLine:PspirvOp;img:PsrNode;dst,coord:PsrRegNode;id:Byte):PSpirvOp;
|
||||
Var
|
||||
node:PSpirvOp;
|
||||
comp:PsrRegNode;
|
||||
begin
|
||||
Case id of
|
||||
0..3:;
|
||||
else
|
||||
Assert(False);
|
||||
end;
|
||||
|
||||
comp:=NewReg_i(dtUint32,id);
|
||||
|
||||
node:=AddSpirvOp(pLine,Op.OpImageGather); //need first
|
||||
|
||||
node^.pType:=TypeList.Fetch(dst^.dtype);
|
||||
node^.pDst:=dst;
|
||||
|
||||
node^.AddParam(img); //Sampled Image
|
||||
node^.AddParam(coord); //Coordinate
|
||||
node^.AddParam(comp); //Component
|
||||
//Image Operands
|
||||
|
||||
Result:=node;
|
||||
end;
|
||||
|
||||
function TEmitOp.OpImageDrefGather(pLine:PspirvOp;img:PsrNode;dst,coord,pcf:PsrRegNode):PSpirvOp;
|
||||
Var
|
||||
node:PSpirvOp;
|
||||
begin
|
||||
node:=AddSpirvOp(pLine,Op.OpImageDrefGather); //need first
|
||||
|
||||
node^.pType:=TypeList.Fetch(dst^.dtype);
|
||||
node^.pDst:=dst;
|
||||
|
||||
node^.AddParam(img); //Sampled Image
|
||||
node^.AddParam(coord); //Coordinate
|
||||
node^.AddParam(pcf); //Dref
|
||||
//Image Operands
|
||||
|
||||
Result:=node;
|
||||
end;
|
||||
|
||||
function TEmitOp.OpImageFetch(pLine:PspirvOp;Tgrp:PsrNode;dst,coord:PsrRegNode):PSpirvOp;
|
||||
Var
|
||||
node:PSpirvOp;
|
||||
|
@ -852,6 +852,7 @@ begin
|
||||
end;
|
||||
end;
|
||||
|
||||
node^.sType:=sType;
|
||||
node^.pType:=pType;
|
||||
|
||||
if node^.IsTop then
|
||||
@ -862,6 +863,7 @@ begin
|
||||
|
||||
end else
|
||||
begin
|
||||
node^.sType:=nil;
|
||||
node^.pType:=TypeList.Fetch(node^.dtype);
|
||||
end;
|
||||
|
||||
|
@ -1745,7 +1745,7 @@ begin
|
||||
data[1]:=(1 shl count)-1;
|
||||
num_31:=NewReg_q(dtUInt32,data[1],@Node);
|
||||
//
|
||||
rsl:=OpBitwiseAndTo(rsl,num_31,@node);
|
||||
rsl:=OpAndTo(rsl,num_31,@node);
|
||||
rsl^.PrepType(ord(dtUInt32));
|
||||
end;
|
||||
|
||||
@ -1777,7 +1777,7 @@ begin
|
||||
num_31:=NewReg_q(dtUInt32,31,@Node);
|
||||
//
|
||||
rIndex:=node^.ParamNode(1)^.AsReg; //orig
|
||||
rIndex:=OpBitwiseAndTo(rIndex,num_31,@node);
|
||||
rIndex:=OpAndTo(rIndex,num_31,@node);
|
||||
rIndex^.PrepType(ord(dtUInt32));
|
||||
end;
|
||||
|
||||
@ -1802,7 +1802,7 @@ begin
|
||||
end;
|
||||
//
|
||||
rCount:=node^.ParamNode(2)^.AsReg; //orig
|
||||
rCount:=OpBitwiseAndTo(rCount,num_31,@node);
|
||||
rCount:=OpAndTo(rCount,num_31,@node);
|
||||
rCount^.PrepType(ord(dtUInt32));
|
||||
end;
|
||||
|
||||
@ -1868,13 +1868,13 @@ begin
|
||||
src[0]:=node^.ParamNode(1)^.AsReg;
|
||||
src[1]:=node^.ParamNode(2)^.AsReg;
|
||||
|
||||
src[0]:=OpBitwiseAndTo(src[0],bitmsk,@node);
|
||||
src[0]:=OpAndTo(src[0],bitmsk,@node);
|
||||
src[0]^.PrepType(ord(dtUInt32));
|
||||
|
||||
bitmsk:=OpNotTo(bitmsk,@node);
|
||||
bitmsk^.PrepType(ord(dtUInt32));
|
||||
|
||||
src[1]:=OpBitwiseAndTo(src[1],bitmsk,@node);
|
||||
src[1]:=OpAndTo(src[1],bitmsk,@node);
|
||||
src[1]^.PrepType(ord(dtUInt32));
|
||||
|
||||
_Op2(node,Op.OpBitwiseOr,dst,src[0],src[1]);
|
||||
|
@ -27,7 +27,9 @@ type
|
||||
procedure emit_S_AND_B64;
|
||||
procedure emit_S_ANDN2_B64;
|
||||
procedure emit_S_OR_B64;
|
||||
procedure emit_S_XOR_B64;
|
||||
procedure emit_S_ORN2_B64;
|
||||
procedure emit_S_NAND_B64;
|
||||
procedure emit_S_NOR_B64;
|
||||
procedure emit_S_CSELECT_B32;
|
||||
procedure emit_S_CSELECT_B64;
|
||||
@ -117,7 +119,7 @@ begin
|
||||
src[0]:=fetch_ssrc9(FSPI.SOP2.SSRC0,dtUInt32);
|
||||
src[1]:=fetch_ssrc9(FSPI.SOP2.SSRC1,dtUInt32);
|
||||
|
||||
src[1]:=OpBitwiseAndTo(src[1],31);
|
||||
src[1]:=OpAndTo(src[1],31);
|
||||
src[1]^.PrepType(ord(dtUInt32));
|
||||
|
||||
Op2(Op.OpShiftLeftLogical,src[0]^.dtype,dst,src[0],src[1]);
|
||||
@ -135,7 +137,7 @@ begin
|
||||
src[0]:=fetch_ssrc9(FSPI.SOP2.SSRC0,dtUInt32);
|
||||
src[1]:=fetch_ssrc9(FSPI.SOP2.SSRC1,dtUInt32);
|
||||
|
||||
src[1]:=OpBitwiseAndTo(src[1],31);
|
||||
src[1]:=OpAndTo(src[1],31);
|
||||
src[1]^.PrepType(ord(dtUInt32));
|
||||
|
||||
Op2(Op.OpShiftRightLogical,src[0]^.dtype,dst,src[0],src[1]);
|
||||
@ -143,7 +145,7 @@ begin
|
||||
OpISccNotZero(dst^.current); //SCC = (sdst.u != 0)
|
||||
end;
|
||||
|
||||
procedure TEmit_SOP2.emit_S_AND_B32;
|
||||
procedure TEmit_SOP2.emit_S_AND_B32; //sdst = (ssrc0 & ssrc1); SCC = (sdst != 0)
|
||||
Var
|
||||
dst:PsrRegSlot;
|
||||
src:array[0..1] of PsrRegNode;
|
||||
@ -158,7 +160,7 @@ begin
|
||||
OpISccNotZero(dst^.current); //SCC = (sdst.u != 0)
|
||||
end;
|
||||
|
||||
procedure TEmit_SOP2.emit_S_AND_B64; //SCC = (sdst[2] != 0)
|
||||
procedure TEmit_SOP2.emit_S_AND_B64; //sdst[2] = (ssrc0[2] & ssrc1[2]); SCC = (sdst[2] != 0)
|
||||
Var
|
||||
dst:array[0..1] of PsrRegSlot;
|
||||
src0,src1,src2:array[0..1] of PsrRegNode;
|
||||
@ -177,7 +179,7 @@ begin
|
||||
OpLogicalOr(get_scc,src2[0],src2[1]); //implict cast (int != 0)
|
||||
end;
|
||||
|
||||
procedure TEmit_SOP2.emit_S_ANDN2_B64; //SCC = (sdst[2] != 0)
|
||||
procedure TEmit_SOP2.emit_S_ANDN2_B64; //sdst[2] = (ssrc0[2] & ~ssrc1[2]); SCC = (sdst[2] != 0)
|
||||
Var
|
||||
dst:array[0..1] of PsrRegSlot;
|
||||
src0,src1,src2:array[0..1] of PsrRegNode;
|
||||
@ -199,7 +201,7 @@ begin
|
||||
OpLogicalOr(get_scc,src2[0],src2[1]); //implict cast (int != 0)
|
||||
end;
|
||||
|
||||
procedure TEmit_SOP2.emit_S_OR_B64; //SCC = (sdst[2] != 0)
|
||||
procedure TEmit_SOP2.emit_S_OR_B64; //sdst[2] = (ssrc0[2] | ssrc1[2]); SCC = (sdst[2] != 0)
|
||||
Var
|
||||
dst:array[0..1] of PsrRegSlot;
|
||||
src0,src1,src2:array[0..1] of PsrRegNode;
|
||||
@ -218,7 +220,26 @@ begin
|
||||
OpLogicalOr(get_scc,src2[0],src2[1]); //implict cast (int != 0)
|
||||
end;
|
||||
|
||||
procedure TEmit_SOP2.emit_S_ORN2_B64; //SCC = (sdst[2] != 0)
|
||||
procedure TEmit_SOP2.emit_S_XOR_B64; //sdst[2] = (ssrc0[2] ^ ssrc1[2]); SCC = (sdst[2] != 0)
|
||||
Var
|
||||
dst:array[0..1] of PsrRegSlot;
|
||||
src0,src1,src2:array[0..1] of PsrRegNode;
|
||||
begin
|
||||
if not get_sdst7_pair(FSPI.SOP2.SDST,@dst) then Assert(False);
|
||||
|
||||
if not fetch_ssrc9_pair(FSPI.SOP2.SSRC0,@src0,dtUInt32) then Assert(False);
|
||||
if not fetch_ssrc9_pair(FSPI.SOP2.SSRC1,@src1,dtUInt32) then Assert(False);
|
||||
|
||||
OpBitwiseXor(dst[0],src0[0],src1[0]);
|
||||
OpBitwiseXor(dst[1],src0[1],src1[1]);
|
||||
|
||||
src2[0]:=dst[0]^.current;
|
||||
src2[1]:=dst[1]^.current;
|
||||
|
||||
OpLogicalOr(get_scc,src2[0],src2[1]); //implict cast (int != 0)
|
||||
end;
|
||||
|
||||
procedure TEmit_SOP2.emit_S_ORN2_B64; //sdst[2] = (ssrc0[2] | ~ssrc1[2]); SCC = (sdst[2] != 0)
|
||||
Var
|
||||
dst:array[0..1] of PsrRegSlot;
|
||||
src0,src1,src2:array[0..1] of PsrRegNode;
|
||||
@ -240,7 +261,7 @@ begin
|
||||
OpLogicalOr(get_scc,src2[0],src2[1]); //implict cast (int != 0)
|
||||
end;
|
||||
|
||||
procedure TEmit_SOP2.emit_S_NOR_B64; //SCC = (sdst[2] != 0)
|
||||
procedure TEmit_SOP2.emit_S_NAND_B64; //sdst[2] = ~(ssrc0[2] & ssrc1[2]); SCC = (sdst[2] != 0)
|
||||
Var
|
||||
dst:array[0..1] of PsrRegSlot;
|
||||
src0,src1,src2:array[0..1] of PsrRegNode;
|
||||
@ -250,8 +271,30 @@ begin
|
||||
if not fetch_ssrc9_pair(FSPI.SOP2.SSRC0,@src0,dtUInt32) then Assert(False);
|
||||
if not fetch_ssrc9_pair(FSPI.SOP2.SSRC1,@src1,dtUInt32) then Assert(False);
|
||||
|
||||
src2[0]:=OpBitwiseOrTo(src0[0],src1[0]);
|
||||
src2[1]:=OpBitwiseOrTo(src0[1],src1[1]);
|
||||
src2[0]:=OpAndTo(src0[0],src1[0]);
|
||||
src2[1]:=OpAndTo(src0[1],src1[1]);
|
||||
|
||||
OpNot(dst[0],src2[0]);
|
||||
OpNot(dst[1],src2[1]);
|
||||
|
||||
src2[0]:=dst[0]^.current;
|
||||
src2[1]:=dst[1]^.current;
|
||||
|
||||
OpLogicalOr(get_scc,src2[0],src2[1]); //implict cast (int != 0)
|
||||
end;
|
||||
|
||||
procedure TEmit_SOP2.emit_S_NOR_B64; //sdst[2] = ~(ssrc0[2] | ssrc1[2]); SCC = (sdst[2] != 0)
|
||||
Var
|
||||
dst:array[0..1] of PsrRegSlot;
|
||||
src0,src1,src2:array[0..1] of PsrRegNode;
|
||||
begin
|
||||
if not get_sdst7_pair(FSPI.SOP2.SDST,@dst) then Assert(False);
|
||||
|
||||
if not fetch_ssrc9_pair(FSPI.SOP2.SSRC0,@src0,dtUInt32) then Assert(False);
|
||||
if not fetch_ssrc9_pair(FSPI.SOP2.SSRC1,@src1,dtUInt32) then Assert(False);
|
||||
|
||||
src2[0]:=OpOrTo(src0[0],src1[0]);
|
||||
src2[1]:=OpOrTo(src0[1],src1[1]);
|
||||
|
||||
OpNot(dst[0],src2[0]);
|
||||
OpNot(dst[1],src2[1]);
|
||||
@ -307,7 +350,7 @@ begin
|
||||
src[0]:=fetch_ssrc9(FSPI.SOP2.SSRC0,dtUint32);
|
||||
src[1]:=fetch_ssrc9(FSPI.SOP2.SSRC1,dtUint32);
|
||||
|
||||
offset:=OpBitwiseAndTo(src[1],31);
|
||||
offset:=OpAndTo(src[1],31);
|
||||
count :=OpShrTo(src[1],16);
|
||||
|
||||
Op3(Op.OpBitFieldUExtract,dtUInt32,dst,src[0],offset,count);
|
||||
@ -337,8 +380,12 @@ begin
|
||||
|
||||
S_OR_B64: emit_S_OR_B64;
|
||||
|
||||
S_XOR_B64: emit_S_XOR_B64;
|
||||
|
||||
S_ORN2_B64: emit_S_ORN2_B64;
|
||||
|
||||
S_NAND_B64: emit_S_NAND_B64;
|
||||
|
||||
S_NOR_B64: emit_S_NOR_B64;
|
||||
|
||||
S_CSELECT_B32: emit_S_CSELECT_B32;
|
||||
|
@ -228,7 +228,8 @@ begin
|
||||
adr.stride :=PV^.stride;
|
||||
adr.align :=info.GetAlignSize;
|
||||
adr.fsize :=info.GetSizeFormat;
|
||||
adr.csize :=Min(info.GetElemSize*info.count,adr.fsize);
|
||||
adr.csize :=adr.fsize;
|
||||
//adr.csize :=Min(info.GetElemSize*info.count,adr.fsize);
|
||||
adr.ioffset:=FSPI.MUBUF.OFFSET;
|
||||
|
||||
if (adr.stride=0) then adr.stride:=1;
|
||||
|
@ -97,7 +97,7 @@ begin
|
||||
dst:=get_vdst8(FSPI.VOP1.VDST);
|
||||
src:=fetch_ssrc9(FSPI.VOP1.SRC0,dtUInt32);
|
||||
|
||||
src:=OpBitwiseAndTo(src,15);
|
||||
src:=OpAndTo(src,15);
|
||||
src^.PrepType(ord(dtInt32));
|
||||
|
||||
src:=OpISubTo(src,8);
|
||||
@ -116,7 +116,7 @@ begin
|
||||
dst:=get_vdst8(FSPI.VOP1.VDST);
|
||||
src:=fetch_ssrc9(FSPI.VOP1.SRC0,dtUInt32);
|
||||
|
||||
src:=OpBitwiseAndTo(src,$FF);
|
||||
src:=OpAndTo(src,$FF);
|
||||
src^.PrepType(ord(dtUInt32));
|
||||
|
||||
Op1(Op.OpConvertUToF,dtFloat32,dst,src);
|
||||
|
@ -124,7 +124,7 @@ begin
|
||||
src[0]:=fetch_ssrc9(FSPI.VOP2.SRC0 ,rtype);
|
||||
src[1]:=fetch_vsrc8(FSPI.VOP2.VSRC1,dtUint32);
|
||||
|
||||
src[1]:=OpBitwiseAndTo(src[1],31);
|
||||
src[1]:=OpAndTo(src[1],31);
|
||||
src[1]^.PrepType(ord(dtUInt32));
|
||||
|
||||
Op2(OpId,src[0]^.dtype,dst,src[0],src[1]);
|
||||
@ -140,7 +140,7 @@ begin
|
||||
src[0]:=fetch_ssrc9(FSPI.VOP2.SRC0 ,dtUint32);
|
||||
src[1]:=fetch_vsrc8(FSPI.VOP2.VSRC1,rtype);
|
||||
|
||||
src[0]:=OpBitwiseAndTo(src[0],31);
|
||||
src[0]:=OpAndTo(src[0],31);
|
||||
src[0]^.PrepType(ord(dtUInt32));
|
||||
|
||||
Op2(OpId,src[1]^.dtype,dst,src[1],src[0]);
|
||||
@ -275,10 +275,10 @@ begin
|
||||
|
||||
bit24:=NewReg_q(dtUInt32,$FFFFFF);
|
||||
|
||||
src[0]:=OpBitwiseAndTo(src[0],bit24);
|
||||
src[0]:=OpAndTo(src[0],bit24);
|
||||
src[0]^.PrepType(ord(dtInt32));
|
||||
|
||||
src[1]:=OpBitwiseAndTo(src[1],bit24);
|
||||
src[1]:=OpAndTo(src[1],bit24);
|
||||
src[1]^.PrepType(ord(dtInt32));
|
||||
|
||||
OpIMul(dst,src[0],src[1]);
|
||||
@ -297,10 +297,10 @@ begin
|
||||
|
||||
bit24:=NewReg_q(dtUInt32,$FFFFFF);
|
||||
|
||||
src[0]:=OpBitwiseAndTo(src[0],bit24);
|
||||
src[0]:=OpAndTo(src[0],bit24);
|
||||
src[0]^.PrepType(ord(dtUInt32));
|
||||
|
||||
src[1]:=OpBitwiseAndTo(src[1],bit24);
|
||||
src[1]:=OpAndTo(src[1],bit24);
|
||||
src[1]^.PrepType(ord(dtUInt32));
|
||||
|
||||
OpIMul(dst,src[0],src[1]);
|
||||
|
@ -339,10 +339,10 @@ begin
|
||||
|
||||
bit24:=NewReg_q(dtUInt32,$FFFFFF);
|
||||
|
||||
src[0]:=OpBitwiseAndTo(src[0],bit24);
|
||||
src[0]:=OpAndTo(src[0],bit24);
|
||||
src[0]^.PrepType(ord(dtInt32));
|
||||
|
||||
src[1]:=OpBitwiseAndTo(src[1],bit24);
|
||||
src[1]:=OpAndTo(src[1],bit24);
|
||||
src[1]^.PrepType(ord(dtInt32));
|
||||
|
||||
OpIMul(dst,src[0],src[1]);
|
||||
@ -366,10 +366,10 @@ begin
|
||||
|
||||
bit24:=NewReg_q(dtUInt32,$FFFFFF);
|
||||
|
||||
src[0]:=OpBitwiseAndTo(src[0],bit24);
|
||||
src[0]:=OpAndTo(src[0],bit24);
|
||||
src[0]^.PrepType(ord(dtUInt32));
|
||||
|
||||
src[1]:=OpBitwiseAndTo(src[1],bit24);
|
||||
src[1]:=OpAndTo(src[1],bit24);
|
||||
src[1]^.PrepType(ord(dtUInt32));
|
||||
|
||||
OpIMul(dst,src[0],src[1]);
|
||||
@ -530,10 +530,10 @@ begin
|
||||
|
||||
bit24:=NewReg_q(dtUInt32,$FFFFFF);
|
||||
|
||||
src[0]:=OpBitwiseAndTo(src[0],bit24);
|
||||
src[0]:=OpAndTo(src[0],bit24);
|
||||
src[0]^.PrepType(ord(dtInt32));
|
||||
|
||||
src[1]:=OpBitwiseAndTo(src[1],bit24);
|
||||
src[1]:=OpAndTo(src[1],bit24);
|
||||
src[1]^.PrepType(ord(dtInt32));
|
||||
|
||||
OpFmaI32(dst,src[0],src[1],src[2]);
|
||||
@ -558,10 +558,10 @@ begin
|
||||
|
||||
bit24:=NewReg_q(dtUInt32,$FFFFFF);
|
||||
|
||||
src[0]:=OpBitwiseAndTo(src[0],bit24);
|
||||
src[0]:=OpAndTo(src[0],bit24);
|
||||
src[0]^.PrepType(ord(dtUInt32));
|
||||
|
||||
src[1]:=OpBitwiseAndTo(src[1],bit24);
|
||||
src[1]:=OpAndTo(src[1],bit24);
|
||||
src[1]^.PrepType(ord(dtUInt32));
|
||||
|
||||
OpFmaU32(dst,src[0],src[1],src[2]);
|
||||
@ -966,7 +966,7 @@ begin
|
||||
src[1]:=fetch_ssrc9(FSPI.VOP3b.SRC1,dtUInt32);
|
||||
src[2]:=fetch_ssrc9(FSPI.VOP3b.SRC2,dtUInt32);
|
||||
|
||||
src[2]:=OpBitwiseAndTo(src[2],1);
|
||||
src[2]:=OpAndTo(src[2],1);
|
||||
src[2]^.PrepType(ord(dtUInt32));
|
||||
|
||||
OpIAddExt(dst,car,src[0],src[1]); //src0+src1
|
||||
|
@ -122,6 +122,18 @@ begin
|
||||
Blocks.Clear;
|
||||
end;
|
||||
|
||||
procedure _print_hex(addr:Pointer;size:DWORD);
|
||||
var
|
||||
i:DWORD;
|
||||
begin
|
||||
For i:=0 to size-1 do
|
||||
begin
|
||||
if (i<>0) and ((i mod 16)=0) then Writeln;
|
||||
Write(HexStr(PByte(addr)[i],2));
|
||||
end;
|
||||
if (i<>0) and ((i mod 16)<>0) then Writeln;
|
||||
end;
|
||||
|
||||
procedure load_dump(const fname:RawByteString);
|
||||
var
|
||||
M:TMemoryStream;
|
||||
@ -219,6 +231,8 @@ begin
|
||||
addr:=Align(addr,8);
|
||||
end;
|
||||
|
||||
//_print_hex(addr,size);
|
||||
|
||||
Case W.REG of
|
||||
mmCOMPUTE_PGM_LO:
|
||||
begin
|
||||
@ -356,7 +370,7 @@ begin
|
||||
if cfg.FPrintInfo then
|
||||
Writeln('USGPR:',GPU_REGS.PS.RSRC2.USER_SGPR,' VGPRS:',GPU_REGS.PS.RSRC1.VGPRS,' SGPRS:',GPU_REGS.PS.RSRC1.SGPRS);
|
||||
|
||||
SprvEmit.InitPs(GPU_REGS.PS.RSRC2,GPU_REGS.PS.INPUT_ENA);
|
||||
SprvEmit.InitPs(GPU_REGS.PS.RSRC1,GPU_REGS.PS.RSRC2,GPU_REGS.PS.INPUT_ENA);
|
||||
SprvEmit.SetUserData(@GPU_REGS.PS.USER_DATA);
|
||||
end;
|
||||
kShaderTypeVsVs:
|
||||
@ -364,7 +378,7 @@ begin
|
||||
if cfg.FPrintInfo then
|
||||
Writeln('USGPR:',GPU_REGS.VS.RSRC2.USER_SGPR,' VGPRS:',GPU_REGS.VS.RSRC1.VGPRS,' SGPRS:',GPU_REGS.VS.RSRC1.SGPRS);
|
||||
|
||||
SprvEmit.InitVs(GPU_REGS.VS.RSRC2,GPU_REGS.VGT_NUM_INSTANCES);
|
||||
SprvEmit.InitVs(GPU_REGS.VS.RSRC1,GPU_REGS.VS.RSRC2,GPU_REGS.VGT_NUM_INSTANCES);
|
||||
SprvEmit.SetUserData(@GPU_REGS.VS.USER_DATA);
|
||||
end;
|
||||
kShaderTypeCs:
|
||||
@ -372,9 +386,8 @@ begin
|
||||
if cfg.FPrintInfo then
|
||||
Writeln('USGPR:',GPU_REGS.CS.RSRC2.USER_SGPR,' VGPRS:',GPU_REGS.CS.RSRC1.VGPRS,' SGPRS:',GPU_REGS.CS.RSRC1.SGPRS);
|
||||
|
||||
SprvEmit.InitCs(GPU_REGS.CS.RSRC2,GPU_REGS.CS.NUM_THREAD_X,GPU_REGS.CS.NUM_THREAD_Y,GPU_REGS.CS.NUM_THREAD_Z);
|
||||
SprvEmit.InitCs(GPU_REGS.CS.RSRC1,GPU_REGS.CS.RSRC2,GPU_REGS.CS.NUM_THREAD_X,GPU_REGS.CS.NUM_THREAD_Y,GPU_REGS.CS.NUM_THREAD_Z);
|
||||
SprvEmit.SetUserData(@GPU_REGS.CS.USER_DATA);
|
||||
|
||||
end;
|
||||
|
||||
else
|
||||
|
@ -53,7 +53,9 @@ type
|
||||
|
||||
FCount:PtrUint;
|
||||
dtype:TsrDataType;
|
||||
pType:PsrType;
|
||||
|
||||
sType,pType:PsrType;
|
||||
|
||||
FID:Integer; //alloc late
|
||||
|
||||
//
|
||||
@ -72,8 +74,8 @@ type
|
||||
function FetchValue(_offset,_size:PtrUint;_dtype:TsrDataType):TFieldFetchValue;
|
||||
function FetchRuntimeArray(_offset,_stride:PtrUint):TFieldFetchValue;
|
||||
function IsStructUsedRuntimeArray:Boolean;
|
||||
function IsStructNotUsed:Boolean; inline;
|
||||
function IsTop:Boolean; inline;
|
||||
function IsStructNotUsed:Boolean;
|
||||
function IsTop:Boolean;
|
||||
function GetStructDecorate:DWORD;
|
||||
procedure UpdateSize;
|
||||
function GetSize:PtrUint;
|
||||
@ -262,6 +264,8 @@ begin
|
||||
_stride:=_dtype.Child.BitSize div 8;
|
||||
end;
|
||||
|
||||
Assert(_size=(_dtype.BitSize div 8));
|
||||
|
||||
node:=Find_le(_offset);
|
||||
if (node<>nil) then
|
||||
begin
|
||||
@ -410,12 +414,25 @@ begin
|
||||
end;
|
||||
end;
|
||||
|
||||
function TsrField.IsStructNotUsed:Boolean; inline;
|
||||
function TsrField.IsStructNotUsed:Boolean;
|
||||
var
|
||||
child:PsrField;
|
||||
begin
|
||||
Result:=(FCount<=1) and (pParent<>nil);
|
||||
Result:=False;
|
||||
|
||||
if IsTop then Exit;
|
||||
if (FCount>1) then Exit;
|
||||
|
||||
child:=First;
|
||||
if (child=nil) then Exit;
|
||||
|
||||
if (child^.offset<>0) then Exit;
|
||||
if (child^.size<>stride) then Exit;
|
||||
|
||||
Result:=True;
|
||||
end;
|
||||
|
||||
function TsrField.IsTop:Boolean; inline;
|
||||
function TsrField.IsTop:Boolean;
|
||||
begin
|
||||
Result:=(pParent=nil);
|
||||
end;
|
||||
@ -886,7 +903,7 @@ begin
|
||||
pVar:=node^.pVar;
|
||||
if (pVar<>nil) and node^.IsUsed then
|
||||
begin
|
||||
pDebugInfoList^.OpSourceExtension(node^.GetString);
|
||||
pDebugInfoList^.OpSource(node^.GetString);
|
||||
end;
|
||||
node:=Next(node);
|
||||
end;
|
||||
@ -1022,18 +1039,19 @@ var
|
||||
node:PsrField;
|
||||
SD:DWORD;
|
||||
begin
|
||||
if (pField^.dtype<>dtTypeStruct) then Exit;
|
||||
if (pField^.pType=nil) then Exit;
|
||||
if (pField^.sType=nil) then Exit;
|
||||
if (pField^.sType^.dtype<>dtTypeStruct) then Exit;
|
||||
|
||||
pDecorateList:=FEmit.GetDecorateList;
|
||||
SD:=pField^.GetStructDecorate;
|
||||
if (SD<>DWORD(-1)) then
|
||||
begin
|
||||
pDecorateList^.OpDecorate(pField^.pType,SD,0);
|
||||
pDecorateList^.OpDecorate(pField^.sType,SD,0);
|
||||
end;
|
||||
node:=pField^.First;
|
||||
While (node<>nil) do
|
||||
begin
|
||||
pDecorateList^.OpMemberDecorate(pField^.pType,node^.FID,node^.offset);
|
||||
pDecorateList^.OpMember(pField^.sType,node^.FID,node^.offset);
|
||||
node:=pField^.Next(node);
|
||||
end;
|
||||
end;
|
||||
|
@ -6,6 +6,7 @@ interface
|
||||
|
||||
uses
|
||||
spirv,
|
||||
ginodes,
|
||||
srNode,
|
||||
srOp;
|
||||
|
||||
@ -16,21 +17,42 @@ type
|
||||
function emit_glsl_ext:PSpirvOp;
|
||||
end;
|
||||
|
||||
PsrDecorate=^TsrDecorate;
|
||||
TsrDecorate=object
|
||||
private
|
||||
pLeft,pRight:PsrDecorate;
|
||||
//----
|
||||
key:packed record
|
||||
data:PsrNode;
|
||||
param:array[0..2] of DWORD;
|
||||
end;
|
||||
function c(n1,n2:PsrDecorate):Integer; static;
|
||||
public
|
||||
node:PSpirvOp;
|
||||
end;
|
||||
|
||||
PsrDecorateList=^TsrDecorateList;
|
||||
TsrDecorateList=object(TsrOpBlockCustom)
|
||||
type
|
||||
TNodeFetch=specialize TNodeFetch<PsrDecorate,TsrDecorate>;
|
||||
var
|
||||
FNTree:TNodeFetch;
|
||||
function Fetch(data:PsrNode;param1,param2,param3:DWORD):PsrDecorate;
|
||||
procedure OpDecorate(Data:PsrNode;dec_id,param:DWORD);
|
||||
procedure OpMemberDecorate(Data:PsrNode;index,offset:DWORD);
|
||||
procedure OpMember (Data:PsrNode;index,offset:DWORD);
|
||||
end;
|
||||
|
||||
PsrDebugInfoList=^TsrDebugInfoList;
|
||||
TsrDebugInfoList=object(TsrOpBlockCustom)
|
||||
procedure OpSourceExtension(const n:RawByteString);
|
||||
procedure OpName(Data:PsrNode;const n:RawByteString);
|
||||
procedure OpSource(const n:RawByteString);
|
||||
procedure OpName (Data:PsrNode;const n:RawByteString);
|
||||
function OpString(const n:RawByteString):PsrNode;
|
||||
end;
|
||||
|
||||
implementation
|
||||
|
||||
//
|
||||
|
||||
function TsrHeaderList.emit_glsl_ext:PSpirvOp;
|
||||
begin
|
||||
if (FGLSL_std_450=nil) then
|
||||
@ -42,13 +64,57 @@ begin
|
||||
Result:=FGLSL_std_450;
|
||||
end;
|
||||
|
||||
//
|
||||
|
||||
function TsrDecorate.c(n1,n2:PsrDecorate):Integer;
|
||||
var
|
||||
i:Byte;
|
||||
begin
|
||||
//first data
|
||||
Result:=Integer(n1^.key.data>n2^.key.data)-Integer(n1^.key.data<n2^.key.data);
|
||||
if (Result<>0) then Exit;
|
||||
|
||||
//param[i]
|
||||
For i:=0 to 2 do
|
||||
begin
|
||||
Result:=Integer(n1^.key.param[i]>n2^.key.param[i])-Integer(n1^.key.param[i]<n2^.key.param[i]);
|
||||
if (Result<>0) then Exit;
|
||||
end;
|
||||
end;
|
||||
|
||||
//
|
||||
|
||||
function TsrDecorateList.Fetch(data:PsrNode;param1,param2,param3:DWORD):PsrDecorate;
|
||||
var
|
||||
node:TsrDecorate;
|
||||
begin
|
||||
node:=Default(TsrDecorate);
|
||||
node.key.data:=data;
|
||||
node.key.param[0]:=param1;
|
||||
node.key.param[1]:=param2;
|
||||
node.key.param[2]:=param3;
|
||||
|
||||
Result:=FNTree.Find(@node);
|
||||
if (Result=nil) then
|
||||
begin
|
||||
Result:=Emit.Alloc(SizeOf(TsrDecorate));
|
||||
Move(node,Result^,SizeOf(TsrDecorate));
|
||||
FNTree.Insert(Result);
|
||||
end;
|
||||
end;
|
||||
|
||||
procedure TsrDecorateList.OpDecorate(Data:PsrNode;dec_id,param:DWORD);
|
||||
var
|
||||
deco:PsrDecorate;
|
||||
node:PSpirvOp;
|
||||
begin
|
||||
deco:=Fetch(Data,Op.OpDecorate,dec_id,param);
|
||||
if (deco^.node<>nil) then Exit;
|
||||
|
||||
node:=AddSpirvOp(Op.OpDecorate);
|
||||
node^.AddParam(Data);
|
||||
node^.AddLiteral(dec_id,Decoration.GetStr(dec_id));
|
||||
|
||||
Case dec_id of
|
||||
Decoration.BuiltIn:
|
||||
node^.AddLiteral(param,BuiltIn.GetStr(param));
|
||||
@ -63,20 +129,30 @@ begin
|
||||
|
||||
else;
|
||||
end;
|
||||
|
||||
deco^.node:=node;
|
||||
end;
|
||||
|
||||
procedure TsrDecorateList.OpMemberDecorate(Data:PsrNode;index,offset:DWORD);
|
||||
procedure TsrDecorateList.OpMember(Data:PsrNode;index,offset:DWORD);
|
||||
var
|
||||
deco:PsrDecorate;
|
||||
node:PSpirvOp;
|
||||
begin
|
||||
deco:=Fetch(Data,Op.OpMemberDecorate,index,offset);
|
||||
if (deco^.node<>nil) then Exit;
|
||||
|
||||
node:=AddSpirvOp(Op.OpMemberDecorate);
|
||||
node^.AddParam(Data);
|
||||
node^.AddLiteral(index);
|
||||
node^.AddLiteral(Decoration.Offset,Decoration.GetStr(Decoration.Offset));
|
||||
node^.AddLiteral(offset);
|
||||
|
||||
deco^.node:=node;
|
||||
end;
|
||||
|
||||
procedure TsrDebugInfoList.OpSourceExtension(const n:RawByteString);
|
||||
//
|
||||
|
||||
procedure TsrDebugInfoList.OpSource(const n:RawByteString);
|
||||
var
|
||||
node:PSpirvOp;
|
||||
begin
|
||||
@ -103,5 +179,7 @@ begin
|
||||
Result:=node^.pDst;
|
||||
end;
|
||||
|
||||
//
|
||||
|
||||
end.
|
||||
|
||||
|
@ -582,7 +582,7 @@ begin
|
||||
node:=First;
|
||||
While (node<>nil) do
|
||||
begin
|
||||
pDebugInfoList^.OpSourceExtension(node^.GetString);
|
||||
pDebugInfoList^.OpSource(node^.GetString);
|
||||
node:=Next(node);
|
||||
end;
|
||||
end;
|
||||
@ -604,7 +604,7 @@ begin
|
||||
block:=pHeap^.FindByPtr(node^.pData);
|
||||
if (block<>nil) then
|
||||
begin
|
||||
pDebugInfoList^.OpSourceExtension(node^.GetFuncString(block^.Size));
|
||||
pDebugInfoList^.OpSource(node^.GetFuncString(block^.Size));
|
||||
end;
|
||||
end;
|
||||
node:=Next(node);
|
||||
|
@ -442,7 +442,7 @@ begin
|
||||
pVar:=node^.pVar;
|
||||
if (pVar<>nil) and node^.IsUsed then
|
||||
begin
|
||||
pDebugInfoList^.OpSourceExtension(node^.GetString);
|
||||
pDebugInfoList^.OpSource(node^.GetString);
|
||||
end;
|
||||
node:=Next(node);
|
||||
end;
|
||||
|
@ -179,7 +179,7 @@ begin
|
||||
pVar:=node^.pVar;
|
||||
if (pVar<>nil) and node^.IsUsed then
|
||||
begin
|
||||
FDebugInfo^.OpSourceExtension(node^.GetString);
|
||||
FDebugInfo^.OpSource(node^.GetString);
|
||||
end;
|
||||
node:=Next(node);
|
||||
end;
|
||||
|
@ -231,17 +231,17 @@ begin
|
||||
case FStage of
|
||||
vShaderStagePs :
|
||||
begin
|
||||
SprvEmit.InitPs(GPU_REGS.SPI.PS.RSRC2,GPU_REGS.SPI.PS.INPUT_ENA);
|
||||
SprvEmit.InitPs(GPU_REGS.SPI.PS.RSRC1,GPU_REGS.SPI.PS.RSRC2,GPU_REGS.SPI.PS.INPUT_ENA);
|
||||
SprvEmit.SetUserData(@GPU_REGS.SPI.PS.USER_DATA);
|
||||
end;
|
||||
vShaderStageVs:
|
||||
begin
|
||||
SprvEmit.InitVs(GPU_REGS.SPI.VS.RSRC2,GPU_REGS.VGT_NUM_INSTANCES);
|
||||
SprvEmit.InitVs(GPU_REGS.SPI.VS.RSRC1,GPU_REGS.SPI.VS.RSRC2,GPU_REGS.VGT_NUM_INSTANCES);
|
||||
SprvEmit.SetUserData(@GPU_REGS.SPI.VS.USER_DATA);
|
||||
end;
|
||||
vShaderStageCs:
|
||||
begin
|
||||
SprvEmit.InitCs(GPU_REGS.SPI.CS.RSRC2,GPU_REGS.SPI.CS.NUM_THREAD_X,GPU_REGS.SPI.CS.NUM_THREAD_Y,GPU_REGS.SPI.CS.NUM_THREAD_Z);
|
||||
SprvEmit.InitCs(GPU_REGS.SPI.CS.RSRC1,GPU_REGS.SPI.CS.RSRC2,GPU_REGS.SPI.CS.NUM_THREAD_X,GPU_REGS.SPI.CS.NUM_THREAD_Y,GPU_REGS.SPI.CS.NUM_THREAD_Z);
|
||||
SprvEmit.SetUserData(@GPU_REGS.SPI.CS.USER_DATA);
|
||||
end;
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user