mirror of
https://github.com/red-prig/fpPS4.git
synced 2024-10-07 03:33:20 +00:00
299 lines
6.5 KiB
ObjectPascal
299 lines
6.5 KiB
ObjectPascal
unit emit_SOP1;
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{$mode objfpc}{$H+}
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interface
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uses
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sysutils,
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ps4_pssl,
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spirv,
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srCFGLabel,
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srFlow,
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srType,
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srConst,
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srReg,
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srLayout,
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srOpUtils,
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emit_fetch;
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type
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TEmit_SOP1=class(TEmitFetch)
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procedure emit_SOP1;
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Function GetFuncPtr(src:PPsrRegNode):Pointer;
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procedure emit_S_MOV_B32;
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procedure emit_S_MOV_B64;
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procedure OpISccNotZero(src:PsrRegNode);
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procedure emit_S_NOT_B32;
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procedure emit_S_NOT_B64;
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procedure emit_S_GETPC_B64;
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procedure emit_S_SETPC_B64;
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procedure emit_S_SWAPPC_B64;
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procedure emit_S_AND_SAVEEXEC_B64;
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procedure emit_S_WQM_B32;
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procedure emit_S_WQM_B64;
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procedure emit_S_BREV_B32;
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procedure emit_S_BREV_B64;
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end;
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implementation
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Function TEmit_SOP1.GetFuncPtr(src:PPsrRegNode):Pointer;
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var
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chain:TsrChains;
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pConst:array[0..1] of PsrConst;
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pLayout:PsrDataLayout;
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begin
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Result:=nil;
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src[0]:=RegDown(src[0]);
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src[1]:=RegDown(src[1]);
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Assert(src[0]<>nil);
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Assert(src[1]<>nil);
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if (src[0]^.is_const) and (src[1]^.is_const) then
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begin
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pConst[0]:=src[0]^.AsConst;
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pConst[1]:=src[1]^.AsConst;
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QWORD(Result):=QWORD(pConst[0]^.AsUint32) or (QWORD(pConst[1]^.AsUint32) shl 32);
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end else
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begin
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chain:=Default(TsrChains);
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chain[0]:=GetChainRegNode(src[0]);
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chain[1]:=GetChainRegNode(src[1]);
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pLayout:=DataLayoutList.Grouping(chain,rtFunPtr2);
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Result:=pLayout^.pData;
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end;
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Assert(Result<>nil);
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end;
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procedure TEmit_SOP1.emit_S_MOV_B32;
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Var
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dst:PsrRegSlot;
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src:PsrRegNode;
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begin
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dst:=get_sdst7(FSPI.SOP1.SDST);
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src:=fetch_ssrc9(FSPI.SOP1.SSRC,dtUnknow);
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MakeCopy(dst,src);
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end;
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procedure TEmit_SOP1.emit_S_MOV_B64;
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Var
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dst:array[0..1] of PsrRegSlot;
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src:array[0..1] of PsrRegNode;
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begin
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if not get_sdst7_pair(FSPI.SOP1.SDST,@dst) then Assert(false);
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if not fetch_ssrc9_pair(FSPI.SOP1.SSRC,@src,dtUnknow) then Assert(false);
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MakeCopy(dst[0],src[0]);
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MakeCopy(dst[1],src[1]);
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end;
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procedure TEmit_SOP1.OpISccNotZero(src:PsrRegNode); //SCC = (sdst.u != 0)
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begin
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MakeCopy(get_scc,src);
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get_scc^.current^.dtype:=dtBool; //implict cast (int != 0)
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end;
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procedure TEmit_SOP1.emit_S_NOT_B32; //sdst = ~ssrc; SCC = (sdst != 0)
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Var
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dst:PsrRegSlot;
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src:PsrRegNode;
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begin
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dst:=get_sdst7(FSPI.SOP1.SDST);
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src:=fetch_ssrc9(FSPI.SOP1.SSRC,dtUnknow);
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OpNot(dst,src);
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src:=MakeRead(dst,dtUnknow);
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OpISccNotZero(src);
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end;
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procedure TEmit_SOP1.emit_S_NOT_B64; //sdst[2] = ~ssrc0[2]; SCC = (sdst[2] != 0)
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Var
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dst:array[0..1] of PsrRegSlot;
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src:array[0..1] of PsrRegNode;
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begin
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if not get_sdst7_pair(FSPI.SOP1.SDST,@dst) then Assert(false);
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if not fetch_ssrc9_pair(FSPI.SOP1.SSRC,@src,dtUnknow) then Assert(false);
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OpNot(dst[0],src[0]);
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OpNot(dst[1],src[1]);
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src[0]:=MakeRead(dst[0],dtUnknow);
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src[1]:=MakeRead(dst[1],dtUnknow);
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OpLogicalOr(get_scc,src[0],src[1]); //implict cast (int != 0)
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end;
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procedure TEmit_SOP1.emit_S_GETPC_B64;
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Var
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dst:array[0..1] of PsrRegSlot;
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oldptr:Pointer;
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begin
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if not get_sdst7_pair(FSPI.SOP1.SDST,@dst) then Assert(false);
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oldptr:=GetPtr;
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SetConst_q(dst[0],dtUint32,QWORD(oldptr));
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SetConst_q(dst[1],dtUint32,QWORD(oldptr) shr 32);
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end;
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procedure TEmit_SOP1.emit_S_SETPC_B64;
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Var
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src:array[0..1] of PsrRegNode;
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newptr:Pointer;
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begin
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if not fetch_ssrc9_pair(FSPI.SOP1.SSRC,@src,dtUnknow) then Assert(false);
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newptr:=GetFuncPtr(@src);
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SetPtr(newptr,btMain);
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end;
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procedure TEmit_SOP1.emit_S_SWAPPC_B64;
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Var
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dst:array[0..1] of PsrRegSlot;
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src:array[0..1] of PsrRegNode;
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oldptr,newptr:Pointer;
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begin
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if not get_sdst7_pair(FSPI.SOP1.SDST,@dst) then Assert(false);
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if not fetch_ssrc9_pair(FSPI.SOP1.SSRC,@src,dtUnknow) then Assert(false);
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newptr:=GetFuncPtr(@src);
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oldptr:=GetPtr;
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SetConst_q(dst[0],dtUint32,QWORD(oldptr));
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SetConst_q(dst[1],dtUint32,QWORD(oldptr) shr 32);
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SetPtr(newptr,btSetpc);
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end;
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procedure TEmit_SOP1.emit_S_AND_SAVEEXEC_B64; //sdst.du = EXEC;| EXEC = (ssrc.du & EXEC);| SCC = (sdst != 0)
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Var
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dst:array[0..1] of PsrRegSlot;
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src:array[0..1] of PsrRegNode;
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exc:array[0..1] of PsrRegNode;
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begin
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if not get_sdst7_pair(FSPI.SOP1.SDST,@dst) then Assert(False);
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if not fetch_ssrc9_pair(FSPI.SOP1.SSRC,@src,dtUnknow) then Assert(False); //ssrc8
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exc[0]:=MakeRead(get_exec0,dtUnknow);
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exc[1]:=MakeRead(get_exec1,dtUnknow);
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MakeCopy(dst[0],exc[0]);
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MakeCopy(dst[1],exc[1]);
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OpBitwiseAnd(get_exec0,src[0],exc[0]);
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OpBitwiseAnd(get_exec1,src[1],exc[1]);
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//SCC = ((exc[0] != 0) or ((exc[1] != 0))
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OpLogicalOr(get_scc,exc[0],exc[1]); //implict cast (int != 0)
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//SCC = (sdst != 0) SCC = ((exc[0] != 0) or ((exc[1] != 0))
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end;
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procedure TEmit_SOP1.emit_S_WQM_B32;
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Var
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dst:PsrRegSlot;
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src:PsrRegNode;
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begin
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dst:=get_sdst7(FSPI.SOP1.SDST);
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src:=fetch_ssrc9(FSPI.SOP1.SSRC,dtUnknow);
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OpWQM32(dst,src);
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end;
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procedure TEmit_SOP1.emit_S_WQM_B64;
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Var
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dst:array[0..1] of PsrRegSlot;
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src:array[0..1] of PsrRegNode;
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begin
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//S_WQM_B64 EXEC_LO, EXEC_LO //sdst.du = wholeQuadMode(ssrc.du); SCC = (sdst.du != 0)
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//dst[q*4+3:q*4].du = (ssrc[4*q+3:4*q].du != 0) ? 0xF : 0
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//dst[3:0].du = (ssrc[3:0].du != 0) ? 0xF : 0
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//dst[63:60].du = (ssrc[63:60].du != 0) ? 0xF : 0
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//if (ssrc[3:0].du != 0) then dst[63:60].du=0xF else dst[63:60].du=0
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if not get_sdst7_pair(FSPI.SOP1.SDST,@dst) then Assert(False);
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if not fetch_ssrc9_pair(FSPI.SOP1.SSRC,@src,dtUnknow) then Assert(False); //ssrc8
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OpWQM32(dst[0],src[0]);
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OpWQM32(dst[1],src[1]);
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end;
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procedure TEmit_SOP1.emit_S_BREV_B32; //sdst[31:0] = ssrc[0:31]
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Var
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dst:PsrRegSlot;
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src:PsrRegNode;
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begin
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dst:=get_sdst7(FSPI.SOP1.SDST);
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src:=fetch_ssrc9(FSPI.SOP1.SSRC,dtUInt32);
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Op1(Op.OpBitReverse,dtUInt32,dst,src);
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end;
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procedure TEmit_SOP1.emit_S_BREV_B64; //sdst[63:0] = ssrc[0:63]
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Var
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dst:array[0..1] of PsrRegSlot;
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src:array[0..1] of PsrRegNode;
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begin
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if not get_sdst7_pair(FSPI.SOP1.SDST,@dst) then Assert(false);
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if not fetch_ssrc9_pair(FSPI.SOP1.SSRC,@src,dtUnknow) then Assert(false);
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Op1(Op.OpBitReverse,dtUInt32,dst[0],src[1]); //0 -> 1
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Op1(Op.OpBitReverse,dtUInt32,dst[1],src[0]); //1 -> 0
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end;
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procedure TEmit_SOP1.emit_SOP1;
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begin
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Case FSPI.SOP1.OP of
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S_MOV_B32 : emit_S_MOV_B32;
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S_MOV_B64 : emit_S_MOV_B64;
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S_NOT_B32 : emit_S_NOT_B32;
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S_NOT_B64 : emit_S_NOT_B64;
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S_WQM_B32 : emit_S_WQM_B32;
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S_WQM_B64 : emit_S_WQM_B64;
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S_BREV_B32 : emit_S_BREV_B32;
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S_BREV_B64 : emit_S_BREV_B64;
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S_GETPC_B64 : emit_S_GETPC_B64;
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S_SETPC_B64 : emit_S_SETPC_B64;
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S_SWAPPC_B64 : emit_S_SWAPPC_B64;
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S_AND_SAVEEXEC_B64: emit_S_AND_SAVEEXEC_B64;
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else
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Assert(false,'SOP1?'+IntToStr(FSPI.SOP1.OP));
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end;
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end;
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end.
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