Emulator-Archive/ppsspp
1
0
Fork 0
mirror of https://github.com/hrydgard/ppsspp.git synced 2024-11-23 13:30:02 +00:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity

x86jit: Correct spill on IR lane extract.

Browse Source
This commit is contained in:
Unknown W. Brackets 2023-09-24 19:06:06 -07:00
parent 06a1f0b72c
commit 05786f5719
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Core/MIPS/x86/X64IRCompFPU.cpp
View File

@ -208,7 +208,7 @@ void X64JitBackend::CompIR_FAssign(IRInst inst) {
break;
if (regs_.IsFPRMapped(inst.src1 & 3) && regs_.GetFPRLaneCount(inst.src1) == 4 && (inst.dest & ~3) != (inst.src1 & ~3)) {
// Okay, this is an extract. Avoid unvec4ing src1.
regs_.SpillLockFPR(inst.src1);
regs_.SpillLockFPR(inst.src1 & ~3);
regs_.MapFPR(inst.dest, MIPSMap::NOINIT);
CopyVec4ToFPRLane0(regs_.FX(inst.dest), regs_.FX(inst.src1 & ~3), inst.src1 & 3);
} else {