Emulator-Archive/ppsspp
1
0
Fork 0
mirror of https://github.com/hrydgard/ppsspp.git synced 2024-11-23 21:39:52 +00:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity

x86jit: Apply dirty when reusing 1-reg VS.

Browse Source
This commit is contained in:
Unknown W. Brackets 2014-11-27 01:04:52 -08:00
parent bbeb5758b7
commit 0839ce59e1
1 changed files with 6 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
Core/MIPS/x86/RegCacheFPU.cpp
View File

@ -435,6 +435,9 @@ void FPURegCache::SimpleRegV(const u8 v, int flags) {
MIPSCachedFPReg &vr = vregs[v];
// Special optimization: if it's in a single simd, we can keep it there.
if (vr.lane == 1 && xregs[VSX(&v)].mipsRegs[1] == -1) {
if (flags & MAP_DIRTY) {
xregs[VSX(&v)].dirty = true;
}
// Just change the lane to 0.
vr.lane = 0;
} else if (vr.lane != 0) {
@ -447,7 +450,9 @@ void FPURegCache::SimpleRegV(const u8 v, int flags) {
}
} else if (vr.away) {
// There are no immediates in the FPR reg file, so we already had this in a register. Make dirty as necessary.
xregs[VX(v)].dirty = xregs[VX(v)].dirty || ((flags & MAP_DIRTY) != 0);
if (flags & MAP_DIRTY) {
xregs[VX(v)].dirty = true;
}
_assert_msg_(JIT, vr.location.IsSimpleReg(), "not loaded and not simple.");
}
Invariant();