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MIPS: Add EXT/INS/BLTZ eo emitter. Fix LUI.

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This commit is contained in:
Sacha 2014-11-19 13:31:08 +10:00
parent 10f6db27ca
commit 0d2c7846f5
2 changed files with 32 additions and 3 deletions
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30
Common/MipsEmitter.cpp
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@ -114,6 +114,18 @@ void MIPSEmitter::JALR(MIPSReg rd, MIPSReg rs) {
Write32Fields(26, 0x00, 21, rs, 11, rd, 0, 0x09);
}
FixupBranch MIPSEmitter::BLTZ(MIPSReg rs) {
// 000001 sssss xxxxx iiiiiiiiiiiiiii (fix up)
_dbg_assert_msg_(JIT, rs < F_BASE, "Bad emitter arguments");
FixupBranch b = MakeFixupBranch(BRANCH_16);
Write32Fields(26, 0x01, 21, rs);
return b;
}
void MIPSEmitter::BLTZ(MIPSReg rs, const void *func) {
SetJumpTarget(BLTZ(rs), func);
}
FixupBranch MIPSEmitter::BEQ(MIPSReg rs, MIPSReg rt) {
// 000100 sssss ttttt iiiiiiiiiiiiiii (fix up)
_dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
@ -366,9 +378,21 @@ void MIPSEmitter::XORI(MIPSReg rt, MIPSReg rs, s16 imm) {
}
void MIPSEmitter::LUI(MIPSReg rt, s16 imm) {
// 001111 sssss ttttt iiiiiiiiiiiiiiii
// 001111 00000 ttttt iiiiiiiiiiiiiiii
_dbg_assert_msg_(JIT, rt < F_BASE, "Bad emitter arguments");
Write32Fields(26, 0x0f, 21, rt, 0, (u16)imm);
Write32Fields(26, 0x0f, 16, rt, 0, (u16)imm);
}
void MIPSEmitter::INS(MIPSReg rt, MIPSReg rs, s8 pos, s8 size) {
// 011111 sssss ttttt xxxxx yyyyy 000100
_dbg_assert_msg_(JIT, rt < F_BASE && rs < F_BASE && pos <= 0x1f && (size+pos+1) <= 0x1f, "Bad emitter arguments");
Write32Fields(26, 0x1f, 21, rt, 16, rs, 11, (size+pos+1) & 0x1f, 6, pos & 0x1f, 0, 0x04);
}
void MIPSEmitter::EXT(MIPSReg rt, MIPSReg rs, s8 pos, s8 size) {
// 111111 sssss ttttt xxxxx yyyyy 000000
_dbg_assert_msg_(JIT, rt < F_BASE && rs < F_BASE && pos <= 0x1f && size >= 1, "Bad emitter arguments");
Write32Fields(26, 0x3f, 21, rt, 16, rs, 11, (size-1) & 0x1f, 6, pos & 0x1f, 0, 0x00);
}
void MIPSEmitter::DSLL(MIPSReg rd, MIPSReg rt, u8 sa) {
@ -445,4 +469,4 @@ void MIPSCodeBlock::UnWriteProtect() {
UnWriteProtectMemory(region, region_size, false);
}
}
}

5
Common/MipsEmitter.h
View File

@ -114,6 +114,8 @@ public:
inline void B(const void *func) {
return BEQ(R_ZERO, R_ZERO, func);
}
FixupBranch BLTZ(MIPSReg rs);
void BLTZ(MIPSReg rs, const void *func);
FixupBranch BEQ(MIPSReg rs, MIPSReg rt);
void BEQ(MIPSReg rs, MIPSReg rt, const void *func);
FixupBranch BNE(MIPSReg rs, MIPSReg rt);
@ -181,6 +183,9 @@ public:
// Clears the lower bits. On MIPS64, the result is sign extended.
void LUI(MIPSReg rt, s16 imm);
void INS(MIPSReg rt, MIPSReg rs, s8 pos, s8 size);
void EXT(MIPSReg rt, MIPSReg rs, s8 pos, s8 size);
// MIPS64 only. Transparently uses DSLL32 to shift 32-63 bits.
void DSLL(MIPSReg rd, MIPSReg rt, u8 sa);