Emulator-Archive/ppsspp
1
0
Fork 0
mirror of https://github.com/hrydgard/ppsspp.git synced 2024-11-27 07:20:49 +00:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity

jit: Also report invalidation near PC.

Browse Source
This commit is contained in:
Unknown W. Brackets 2023-01-06 19:51:43 -08:00
parent b073d3e207
commit 1f66c1d689
1 changed files with 9 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
Core/MIPS/MIPSInt.cpp
View File

@ -97,7 +97,7 @@ namespace MIPSInt
{
int imm = (s16)(op & 0xFFFF);
int rs = _RS;
int addr = R(rs) + imm;
uint32_t addr = R(rs) + imm;
int func = (op >> 16) & 0x1F;
// Let's only report this once per run to be safe from impacting perf.
@ -116,11 +116,18 @@ namespace MIPSInt
// We assume the CPU won't be reset during this, so no locking.
if (MIPSComp::jit) {
// Let's over invalidate to be super safe.
MIPSComp::jit->InvalidateCacheAt(addr & ~0x3F, 0x40 + (addr & 0x3F));
uint32_t alignedAddr = addr & ~0x3F;
int size = 0x40 + (addr & 0x3F);
MIPSComp::jit->InvalidateCacheAt(alignedAddr, size);
// Using a bool to avoid locking/etc. in case it's slow.
if (!reportedAlignment && (addr & 0x3F) != 0) {
WARN_LOG_REPORT(JIT, "Unaligned icache invalidation of %08x (%08x + %d) at PC=%08x", addr, R(rs), imm, PC);
reportedAlignment = true;
}
if (alignedAddr <= PC + 4 && alignedAddr + size < PC + 4) {
// This is probably rare so we don't use a static bool.
WARN_LOG_REPORT_ONCE(icacheInvalidatePC, JIT, "Invalidating address near PC: %08x (%08x + %d) at PC=%08x", addr, R(rs), imm, PC);
}
}
break;