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x86jit: Fix spill on sc in longer block.

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Unknown W. Brackets 2023-09-11 22:29:46 -07:00
parent 9d058ef312
commit 1fad623397
1 changed files with 6 additions and 0 deletions
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6
Core/MIPS/x86/CompLoadStore.cpp
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@ -428,6 +428,12 @@ namespace MIPSComp {
break;
case 56: // sc
// Map before the jump in case any regs spill. Unlock happens inside CompITypeMemWrite().
// This is not a very common op, but it's in jit so memory breakpoints can trip.
gpr.Lock(rt, rs);
gpr.MapReg(rt, true, true);
gpr.MapReg(rs, true, false);
CMP(8, MDisp(X64JitConstants::CTXREG, -128 + offsetof(MIPSState, llBit)), Imm8(1));
skipStore = J_CC(CC_NE);