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Cut down on work in regcache init on x86.

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Very tiny tiny optimization for games, but 8-10% optimization for tests.
This commit is contained in:
Unknown W. Brackets 2013-09-19 00:29:50 -07:00
parent 54f2bc8262
commit 2751da1cec
3 changed files with 23 additions and 15 deletions
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13
Common/x64Emitter.h
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@ -150,8 +150,6 @@ struct OpArg
bool IsImm() const {return scale == SCALE_IMM8 || scale == SCALE_IMM16 || scale == SCALE_IMM32 || scale == SCALE_IMM64;} bool IsImm() const {return scale == SCALE_IMM8 || scale == SCALE_IMM16 || scale == SCALE_IMM32 || scale == SCALE_IMM64;}
bool IsSimpleReg() const {return scale == SCALE_NONE;} bool IsSimpleReg() const {return scale == SCALE_NONE;}
bool IsSimpleReg(X64Reg reg) const { bool IsSimpleReg(X64Reg reg) const {
if (!IsSimpleReg())
return false;
return GetSimpleReg() == reg; return GetSimpleReg() == reg;
} }
@ -182,9 +180,14 @@ struct OpArg
return INVALID_REG; return INVALID_REG;
} }
u32 GetImmValue() const { u32 GetImmValue() const {
return (u32)offset; return (u32)offset;
} }
// For loops.
void IncreaseOffset(int sz) {
offset += sz;
}
private: private:
u8 scale; u8 scale;
u16 offsetOrBaseReg; u16 offsetOrBaseReg;

10
Core/MIPS/x86/RegCache.cpp
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@ -56,11 +56,11 @@ void GPRRegCache::Start(MIPSState *mips, MIPSAnalyst::AnalysisResults &stats) {
xregs[i].dirty = false; xregs[i].dirty = false;
xregs[i].allocLocked = false; xregs[i].allocLocked = false;
} }
memset(regs, 0, sizeof(regs));
OpArg base = GetDefaultLocation(MIPS_REG_ZERO);
for (int i = 0; i < NUM_MIPS_GPRS; i++) { for (int i = 0; i < NUM_MIPS_GPRS; i++) {
const MIPSGPReg r = MIPSGPReg(i); regs[i].location = base;
regs[i].location = GetDefaultLocation(r); base.IncreaseOffset(sizeof(u32));
regs[i].away = false;
regs[i].locked = false;
} }
// todo: sort to find the most popular regs // todo: sort to find the most popular regs
@ -245,7 +245,7 @@ void GPRRegCache::BindToRegister(MIPSGPReg i, bool doLoad, bool makeDirty) {
emit->MOV(32, newloc, regs[i].location); emit->MOV(32, newloc, regs[i].location);
} }
for (int j = 0; j < 32; j++) { for (int j = 0; j < 32; j++) {
if (i != MIPSGPReg(j) && regs[j].location.IsSimpleReg() && regs[j].location.GetSimpleReg() == xr) { if (i != MIPSGPReg(j) && regs[j].location.IsSimpleReg(xr)) {
ERROR_LOG(JIT, "BindToRegister: Strange condition"); ERROR_LOG(JIT, "BindToRegister: Strange condition");
Crash(); Crash();
} }

15
Core/MIPS/x86/RegCacheFPU.cpp
View File

@ -35,11 +35,16 @@ void FPURegCache::Start(MIPSState *mips, MIPSAnalyst::AnalysisResults &stats) {
xregs[i].mipsReg = -1; xregs[i].mipsReg = -1;
xregs[i].dirty = false; xregs[i].dirty = false;
} }
for (int i = 0; i < NUM_MIPS_FPRS; i++) { memset(regs, 0, sizeof(regs));
regs[i].location = GetDefaultLocation(i); OpArg base = GetDefaultLocation(0);
regs[i].away = false; for (int i = 0; i < 32; i++) {
regs[i].locked = false; regs[i].location = base;
regs[i].tempLocked = false; base.IncreaseOffset(sizeof(float));
}
base = GetDefaultLocation(32);
for (int i = 32; i < NUM_MIPS_FPRS; i++) {
regs[i].location = base;
base.IncreaseOffset(sizeof(float));
} }
} }