Emulator-Archive/ppsspp
1
0
Fork 0
mirror of https://github.com/hrydgard/ppsspp.git synced 2024-11-23 21:39:52 +00:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity

Merge pull request #6503 from unknownbrackets/jit-minor

Browse Source 
Flush the icache before memcpys
This commit is contained in:
Henrik Rydgård 2014-07-06 01:24:13 +02:00
commit 28296baef5
5 changed files with 26 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
Core/HLE/ReplaceTables.cpp
View File

@ -107,6 +107,9 @@ static int Replace_memcpy() {
u32 srcPtr = PARAM(1);
u32 bytes = PARAM(2);
bool skip = false;
// Some games use memcpy on executable code. We need to flush emuhack ops.
currentMIPS->InvalidateICache(srcPtr, bytes);
if (Memory::IsVRAMAddress(destPtr) || Memory::IsVRAMAddress(srcPtr)) {
skip = gpu->PerformMemoryCopy(destPtr, srcPtr, bytes);
}
@ -140,6 +143,9 @@ static int Replace_memcpy16() {
u32 srcPtr = PARAM(1);
u32 bytes = PARAM(2) * 16;
bool skip = false;
// Some games use memcpy on executable code. We need to flush emuhack ops.
currentMIPS->InvalidateICache(srcPtr, bytes);
if (Memory::IsVRAMAddress(destPtr) || Memory::IsVRAMAddress(srcPtr)) {
skip = gpu->PerformMemoryCopy(destPtr, srcPtr, bytes);
}
@ -195,6 +201,9 @@ static int Replace_memmove() {
u32 srcPtr = PARAM(1);
u32 bytes = PARAM(2);
bool skip = false;
// Some games use memcpy on executable code. We need to flush emuhack ops.
currentMIPS->InvalidateICache(srcPtr, bytes);
if (Memory::IsVRAMAddress(destPtr) || Memory::IsVRAMAddress(srcPtr)) {
skip = gpu->PerformMemoryCopy(destPtr, srcPtr, bytes);
}

3
Core/HLE/sceKernelInterrupt.cpp
View File

@ -623,6 +623,9 @@ u32 sceKernelMemcpy(u32 dst, u32 src, u32 size)
{
DEBUG_LOG(SCEKERNEL, "sceKernelMemcpy(dest=%08x, src=%08x, size=%i)", dst, src, size);
// Some games copy from executable code. We need to flush emuhack ops.
currentMIPS->InvalidateICache(src, size);
bool skip = false;
if (Memory::IsVRAMAddress(src) || Memory::IsVRAMAddress(dst)) {
skip = gpu->PerformMemoryCopy(dst, src, size);

2
Core/MIPS/x86/CompBranch.cpp
View File

@ -528,7 +528,7 @@ void Jit::Comp_Jump(MIPSOpcode op) {
// Might be a stubbed address or something?
if (!Memory::IsValidAddress(targetAddr)) {
if (js.nextExit == 0) {
ERROR_LOG_REPORT(JIT, "Jump to invalid address: %08x", targetAddr);
ERROR_LOG_REPORT(JIT, "Jump to invalid address: %08x PC %08x LR %08x", targetAddr, js.compilerPC, currentMIPS->r[MIPS_REG_RA]);
} else {
js.compiling = false;
}

9
Core/MIPS/x86/JitSafeMem.cpp
View File

@ -239,6 +239,9 @@ void JitSafeMem::DoSlowWrite(const void *safeFunc, const OpArg src, int suboffse
if (!src.IsSimpleReg(EDX)) {
jit_->MOV(32, R(EDX), src);
}
if (!g_Config.bIgnoreBadMemAccess) {
jit_->MOV(32, M(&jit_->mips_->pc), Imm32(jit_->js.compilerPC));
}
// This is a special jit-ABI'd function.
jit_->CALL(safeFunc);
#ifdef _M_IX86
@ -266,6 +269,9 @@ bool JitSafeMem::PrepareSlowRead(const void *safeFunc)
jit_->AND(32, R(EAX), Imm32(alignMask_));
}
if (!g_Config.bIgnoreBadMemAccess) {
jit_->MOV(32, M(&jit_->mips_->pc), Imm32(jit_->js.compilerPC));
}
// This is a special jit-ABI'd function.
jit_->CALL(safeFunc);
needsCheck_ = true;
@ -297,6 +303,9 @@ void JitSafeMem::NextSlowRead(const void *safeFunc, int suboffset)
jit_->AND(32, R(EAX), Imm32(alignMask_));
}
if (!g_Config.bIgnoreBadMemAccess) {
jit_->MOV(32, M(&jit_->mips_->pc), Imm32(jit_->js.compilerPC));
}
// This is a special jit-ABI'd function.
jit_->CALL(safeFunc);
}

6
Core/MemMapFunctions.cpp
View File

@ -88,7 +88,8 @@ inline void ReadFromHardware(T &var, const u32 address)
// More RAM (remasters, etc.)
var = *((const T*)GetPointerUnchecked(address));
} else {
if (g_Config.bJit) {
// In jit, we only flush PC when bIgnoreBadMemAccess is off.
if (g_Config.bJit && g_Config.bIgnoreBadMemAccess) {
WARN_LOG(MEMMAP, "ReadFromHardware: Invalid address %08x", address);
} else {
WARN_LOG(MEMMAP, "ReadFromHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
@ -124,7 +125,8 @@ inline void WriteToHardware(u32 address, const T data)
// More RAM (remasters, etc.)
*(T*)GetPointerUnchecked(address) = data;
} else {
if (g_Config.bJit) {
// In jit, we only flush PC when bIgnoreBadMemAccess is off.
if (g_Config.bJit && g_Config.bIgnoreBadMemAccess) {
WARN_LOG(MEMMAP, "WriteToHardware: Invalid address %08x", address);
} else {
WARN_LOG(MEMMAP, "WriteToHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);