From 29365e6775a83fdc686be76a5617ad10ef391ac9 Mon Sep 17 00:00:00 2001 From: "Unknown W. Brackets" Date: Tue, 18 Nov 2014 07:47:06 -0800 Subject: [PATCH] mips: Clean up MIPSXEmitter a bit. Don't even want dangerous funcs like SUB(). Keeping things in opcode order at least locally so it doesn't get confusing to maintain. Also fixed a bunch of missing asserts. --- Common/MipsEmitter.cpp | 94 ++++++++++++++++++++++++------------------ Common/MipsEmitter.h | 26 +++++++----- 2 files changed, 71 insertions(+), 49 deletions(-) diff --git a/Common/MipsEmitter.cpp b/Common/MipsEmitter.cpp index c77ef1b59e..910e222ac4 100644 --- a/Common/MipsEmitter.cpp +++ b/Common/MipsEmitter.cpp @@ -113,7 +113,7 @@ void MIPSXEmitter::JAL(const void *func) { FixupBranch MIPSXEmitter::BEQ(MIPSReg rs, MIPSReg rt) { // 000100 sssss ttttt iiiiiiiiiiiiiii (fix up) - _dbg_assert_msg_(JIT, rs < F_BASE, "Bad emitter arguments"); + _dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments"); FixupBranch b = MakeFixupBranch(BRANCH_16); Write32Fields(26, 0x04, 21, rs, 16, rt); return b; @@ -125,7 +125,7 @@ void MIPSXEmitter::BEQ(MIPSReg rs, MIPSReg rt, const void *func) { FixupBranch MIPSXEmitter::BNE(MIPSReg rs, MIPSReg rt) { // 000101 sssss ttttt iiiiiiiiiiiiiii (fix up) - _dbg_assert_msg_(JIT, rs < F_BASE, "Bad emitter arguments"); + _dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments"); FixupBranch b = MakeFixupBranch(BRANCH_16); Write32Fields(26, 0x05, 21, rs, 16, rt); return b; @@ -219,16 +219,48 @@ void MIPSXEmitter::SLL(MIPSReg rd, MIPSReg rt, u8 sa) { Write32Fields(26, 0x00, 16, rt, 11, rd, 6, sa & 0x1f, 0, 0x00); } +void MIPSXEmitter::SRL(MIPSReg rd, MIPSReg rt, u8 sa) { + // 000000 xxxxx ttttt ddddd aaaaa 000010 + _dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && sa <= 0x1f, "Bad emitter arguments"); + Write32Fields(26, 0x00, 16, rt, 11, rd, 6, sa & 0x1f, 0, 0x02); +} + +void MIPSXEmitter::SRA(MIPSReg rd, MIPSReg rt, u8 sa) { + // 000000 xxxxx ttttt ddddd aaaaa 000011 + _dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && sa <= 0x1f, "Bad emitter arguments"); + Write32Fields(26, 0x00, 16, rt, 11, rd, 6, sa & 0x1f, 0, 0x03); +} + void MIPSXEmitter::SLLV(MIPSReg rd, MIPSReg rt, MIPSReg rs) { - // 000000 sssss ttttt ddddd 00000000100 + // 000000 sssss ttttt ddddd xxxxx 000100 + _dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments"); Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x04); } +void MIPSXEmitter::SRLV(MIPSReg rd, MIPSReg rt, MIPSReg rs) { + // 000000 sssss ttttt ddddd xxxxx 000110 + _dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments"); + Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x06); +} + +void MIPSXEmitter::SRAV(MIPSReg rd, MIPSReg rt, MIPSReg rs) { + // 000000 sssss ttttt ddddd xxxxx 000111 + _dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments"); + Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x07); +} + void MIPSXEmitter::SLT(MIPSReg rd, MIPSReg rs, MIPSReg rt) { - // 000000 sssss ttttt ddddd 00000101010 + // 000000 sssss ttttt ddddd xxxxx 101010 + _dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments"); Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x2a); } +void MIPSXEmitter::SLTU(MIPSReg rd, MIPSReg rs, MIPSReg rt) { + // 000000 sssss ttttt ddddd xxxxx 101011 + _dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments"); + Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x2b); +} + void MIPSXEmitter::SLTI(MIPSReg rt, MIPSReg rs, s16 imm) { // 001010 sssss ttttt iiiiiiiiiiiiiiii _dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments"); @@ -241,38 +273,18 @@ void MIPSXEmitter::SLTIU(MIPSReg rt, MIPSReg rs, s16 imm) { Write32Fields(26, 0x0b, 21, rs, 16, rt, 0, (u16)imm); } -void MIPSXEmitter::SRL(MIPSReg rd, MIPSReg rt, u8 sa) { - // 000000 xxxxx ttttt ddddd aaaaa 000010 - _dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && sa <= 0x1f, "Bad emitter arguments"); - Write32Fields(26, 0x00, 16, rt, 11, rd, 6, sa & 0x1f, 0, 0x02); -} - -void MIPSXEmitter::SRLV(MIPSReg rd, MIPSReg rt, MIPSReg rs) { - // 000000 sssss ttttt ddddd 00000000110 - Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x06); -} - -void MIPSXEmitter::SRA(MIPSReg rd, MIPSReg rt, u8 sa) { - // 000000 xxxxx ttttt ddddd aaaaa 000011 - _dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && sa <= 0x1f, "Bad emitter arguments"); - Write32Fields(26, 0x00, 16, rt, 11, rd, 6, sa & 0x1f, 0, 0x03); -} - -void MIPSXEmitter::SUB(MIPSReg rd, MIPSReg rs, MIPSReg rt) { - // 000000 sssss ttttt ddddd 00000100010 - Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x22); +void MIPSXEmitter::ADDU(MIPSReg rd, MIPSReg rs, MIPSReg rt) { + // 000000 sssss ttttt ddddd 00000100001 + _dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments"); + Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x21); } void MIPSXEmitter::SUBU(MIPSReg rd, MIPSReg rs, MIPSReg rt) { // 000000 sssss ttttt ddddd 00000100011 + _dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments"); Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x23); } -void MIPSXEmitter::ADDU(MIPSReg rd, MIPSReg rs, MIPSReg rt) { - // 000000 sssss ttttt ddddd 00000100001 - Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x21); -} - void MIPSXEmitter::ADDIU(MIPSReg rt, MIPSReg rs, s16 imm) { // 001001 sssss ttttt iiiiiiiiiiiiiiii _dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments"); @@ -281,36 +293,40 @@ void MIPSXEmitter::ADDIU(MIPSReg rt, MIPSReg rs, s16 imm) { void MIPSXEmitter::AND(MIPSReg rd, MIPSReg rs, MIPSReg rt) { // 000000 sssss ttttt ddddd 00000100100 + _dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments"); Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x24); } +void MIPSXEmitter::OR(MIPSReg rd, MIPSReg rs, MIPSReg rt) { + // 000000 sssss ttttt ddddd 00000100101 + _dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments"); + Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x25); +} + +void MIPSXEmitter::XOR(MIPSReg rd, MIPSReg rs, MIPSReg rt) { + // 000000 sssss ttttt ddddd 00000100110 + _dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments"); + Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x26); +} + void MIPSXEmitter::ANDI(MIPSReg rt, MIPSReg rs, s16 imm) { // 001100 sssss ttttt iiiiiiiiiiiiiiii _dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments"); Write32Fields(26, 0x0c, 21, rs, 16, rt, 0, (u16)imm); } -void MIPSXEmitter::OR(MIPSReg rd, MIPSReg rs, MIPSReg rt) { - // 000000 sssss ttttt ddddd 00000100101 - Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x25); -} - void MIPSXEmitter::ORI(MIPSReg rt, MIPSReg rs, s16 imm) { // 001101 sssss ttttt iiiiiiiiiiiiiiii _dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments"); Write32Fields(26, 0x0d, 21, rs, 16, rt, 0, (u16)imm); } -void MIPSXEmitter::XOR(MIPSReg rd, MIPSReg rs, MIPSReg rt) { - // 000000 sssss ttttt ddddd 00000100110 - Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x26); -} - void MIPSXEmitter::XORI(MIPSReg rt, MIPSReg rs, s16 imm) { // 001110 sssss ttttt iiiiiiiiiiiiiiii _dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments"); Write32Fields(26, 0x0e, 21, rs, 16, rt, 0, (u16)imm); } + void MIPSXEmitter::LUI(MIPSReg rt, s16 imm) { // 001111 sssss ttttt iiiiiiiiiiiiiiii _dbg_assert_msg_(JIT, rt < F_BASE, "Bad emitter arguments"); diff --git a/Common/MipsEmitter.h b/Common/MipsEmitter.h index 847c0c1f33..94120b6dd2 100644 --- a/Common/MipsEmitter.h +++ b/Common/MipsEmitter.h @@ -134,26 +134,32 @@ public: void SB(MIPSReg value, MIPSReg base, s16 offset); void SW(MIPSReg value, MIPSReg base, s16 offset); - // The imm is sign extended before those with s16 imm. void SLL(MIPSReg rd, MIPSReg rt, u8 sa); - void SLT(MIPSReg rd, MIPSReg rt, MIPSReg rs); - void SLTI(MIPSReg rd, MIPSReg rt, s16 imm); - void SLTIU(MIPSReg rt, MIPSReg rs, s16 imm); - void SLLV(MIPSReg rd, MIPSReg rt, MIPSReg rs); void SRL(MIPSReg rd, MIPSReg rt, u8 sa); - void SRLV(MIPSReg rd, MIPSReg rt, MIPSReg rs); void SRA(MIPSReg rd, MIPSReg rt, u8 sa); + void SLLV(MIPSReg rd, MIPSReg rt, MIPSReg rs); + void SRLV(MIPSReg rd, MIPSReg rt, MIPSReg rs); + void SRAV(MIPSReg rd, MIPSReg rt, MIPSReg rs); - void SUB(MIPSReg rd, MIPSReg rs, MIPSReg rt); - void SUBU(MIPSReg rd, MIPSReg rs, MIPSReg rt); + void SLT(MIPSReg rd, MIPSReg rt, MIPSReg rs); + void SLTU(MIPSReg rd, MIPSReg rt, MIPSReg rs); + void SLTI(MIPSReg rd, MIPSReg rt, s16 imm); + // Note: very importantly, *sign* extends imm before an unsigned compare. + void SLTIU(MIPSReg rt, MIPSReg rs, s16 imm); + + // ADD/SUB/ADDI intentionally omitted. They are just versions that trap. void ADDU(MIPSReg rd, MIPSReg rs, MIPSReg rt); + void SUBU(MIPSReg rd, MIPSReg rs, MIPSReg rt); void ADDIU(MIPSReg rt, MIPSReg rs, s16 imm); + void SUBIU(MIPSReg rt, MIPSReg rs, s16 imm) { + ADDIU(rt, rs, -imm); + } void AND(MIPSReg rd, MIPSReg rs, MIPSReg rt); - void ANDI(MIPSReg rt, MIPSReg rs, s16 imm); void OR(MIPSReg rd, MIPSReg rs, MIPSReg rt); - void ORI(MIPSReg rt, MIPSReg rs, s16 imm); void XOR(MIPSReg rd, MIPSReg rs, MIPSReg rt); + void ANDI(MIPSReg rt, MIPSReg rs, s16 imm); + void ORI(MIPSReg rt, MIPSReg rs, s16 imm); void XORI(MIPSReg rt, MIPSReg rs, s16 imm); // Clears the lower bits.