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add skeleton implementation of "cache" instruction
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@ -135,7 +135,22 @@ namespace MIPSInt
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{
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void Int_Cache(u32 op)
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{
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// DEBUG_LOG(CPU,"cache instruction %08x",op);
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int imm = (s16)(op & 0xFFFF);
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int rs = _RS;
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int addr = R(rs) + imm;
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int func = (op >> 16) & 0x1F;
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// It appears that a cache line is 0x40 (64) bytes.
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switch (func) {
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case 25: // Hit Invalidate - zaps the line if present in cache. Should not writeback???? scary.
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// No need to do anything.
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break;
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case 27: // D-cube. Hit Writeback Invalidate.
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break;
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default:
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DEBUG_LOG(CPU,"cache instruction affecting %08x : function %i", addr, func);
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}
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PC += 4;
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}
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