From 2f4e6eaf0135ced03e9d28f76e7c50004effa0ab Mon Sep 17 00:00:00 2001
From: Henrik Rydgard <hrydgard@gmail.com>
Date: Wed, 9 Jan 2013 22:46:27 +0100
Subject: [PATCH] Remove allocLock until we need it

---
 Core/MIPS/ARM/ArmCompALU.cpp  | 3 ++-
 Core/MIPS/ARM/ArmRegCache.cpp | 7 +++----
 Core/MIPS/ARM/ArmRegCache.h   | 4 ----
 3 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/Core/MIPS/ARM/ArmCompALU.cpp b/Core/MIPS/ARM/ArmCompALU.cpp
index c9c5c743e1..fa83ae0d0c 100644
--- a/Core/MIPS/ARM/ArmCompALU.cpp
+++ b/Core/MIPS/ARM/ArmCompALU.cpp
@@ -63,6 +63,7 @@ namespace MIPSComp
 
 		switch (op >> 26) 
 		{
+#if 0
 		case 8:	// same as addiu?
 		case 9:	//R(rt) = R(rs) + simm; break;	//addiu
 			{
@@ -87,7 +88,7 @@ namespace MIPSComp
 				} */
 				break;
 			}
-
+#endif
 		//case 12: CompImmLogic(op, &XEmitter::AND, EvalAnd); break;
 		//case 13: CompImmLogic(op, &XEmitter::OR, EvalOr); break;
 		//case 14: CompImmLogic(op, &XEmitter::XOR, EvalXor); break;
diff --git a/Core/MIPS/ARM/ArmRegCache.cpp b/Core/MIPS/ARM/ArmRegCache.cpp
index 090feddf78..20a16ce5d8 100644
--- a/Core/MIPS/ARM/ArmRegCache.cpp
+++ b/Core/MIPS/ARM/ArmRegCache.cpp
@@ -34,7 +34,6 @@ void ArmRegCache::Start(MIPSAnalyst::AnalysisResults &stats) {
 	for (int i = 0; i < 16; i++) {
 		ar[i].mipsReg = -1;
 		ar[i].spillLock = false;
-		ar[i].allocLock = false;
 		ar[i].isDirty = false;
 	}
 	for (int i = 0; i < NUM_MIPSREG; i++) {
@@ -79,7 +78,7 @@ allocate:
 	for (int i = 0; i < allocCount; i++) {
 		int reg = allocOrder[i];
 
-		if (ar[reg].mipsReg == -1 && !ar[reg].allocLock) {
+		if (ar[reg].mipsReg == -1) {
 			// That means it's free. Grab it, and load the value into it (if requested).
 			ar[reg].mipsReg = mipsReg;
 			ar[reg].isDirty = (mapFlags & MAP_DIRTY) ? true : false;
@@ -100,7 +99,7 @@ allocate:
 	int bestToSpill = -1;
 	for (int i = 0; i < allocCount; i++) {
 		int reg = allocOrder[i];
-		if (ar[reg].spillLock || ar[reg].allocLock)
+		if (ar[reg].spillLock)
 			continue;
 		bestToSpill = reg;
 		break;
@@ -112,7 +111,7 @@ allocate:
 		goto allocate;
 	}
 
-	// Uh oh, we have all them alloclocked and spilllocked....
+	// Uh oh, we have all them spilllocked....
 	ERROR_LOG(JIT, "Out of spillable registers at PC %08x!!!", mips_->pc);
 	return INVALID_REG;
 }
diff --git a/Core/MIPS/ARM/ArmRegCache.h b/Core/MIPS/ARM/ArmRegCache.h
index cfc490a87d..127396ddc4 100644
--- a/Core/MIPS/ARM/ArmRegCache.h
+++ b/Core/MIPS/ARM/ArmRegCache.h
@@ -41,7 +41,6 @@ typedef int MIPSReg;
 struct RegARM {
 	int mipsReg;  // if -1, no mipsreg attached.
 	bool isDirty;  // Should the register be written back?
-	bool allocLock;  // if true, this ARM register cannot be used for allocation.
 	bool spillLock;  // if true, this register cannot be spilled.
 };
 
@@ -75,9 +74,6 @@ public:
 	void Init(ARMXEmitter *emitter);
 	void Start(MIPSAnalyst::AnalysisResults &stats);
 
-	// void AllocLock(ARMReg reg, ARMReg reg2 = INVALID_REG, ARMReg reg3 = INVALID_REG);
-	// void ReleaseAllocLock(ARMReg reg);
-
 	// Protect the arm register containing a MIPS register from spilling, to ensure that
 	// it's being kept allocated.
 	void SpillLock(MIPSReg reg, MIPSReg reg2 = -1, MIPSReg reg3 = -1);