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https://github.com/hrydgard/ppsspp.git
synced 2024-11-23 05:19:56 +00:00
Add Try arm emitter I2R funcs.
This way we can use them without giving up the regcache's immediate optimizations.
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@ -163,11 +163,19 @@ void ARMXEmitter::MOVI2F(ARMReg dest, float val, ARMReg tempReg, bool negate)
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}
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void ARMXEmitter::ADDI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch)
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{
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if (!TryADDI2R(rd, rs, val)) {
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MOVI2R(scratch, val);
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ADD(rd, rs, scratch);
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}
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}
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bool ARMXEmitter::TryADDI2R(ARMReg rd, ARMReg rs, u32 val)
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{
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if (val == 0) {
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if (rd != rs)
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MOV(rd, rs);
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return;
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return true;
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}
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Operand2 op2;
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bool negated;
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@ -176,6 +184,7 @@ void ARMXEmitter::ADDI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch)
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ADD(rd, rs, op2);
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else
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SUB(rd, rs, op2);
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return true;
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} else {
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// Try 16-bit additions and subtractions - easy to test for.
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// Should also try other rotations...
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@ -183,30 +192,41 @@ void ARMXEmitter::ADDI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch)
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// Decompose into two additions.
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ADD(rd, rs, Operand2((u8)(val >> 8), 12)); // rotation right by 12*2 == rotation left by 8
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ADD(rd, rd, Operand2((u8)(val), 0));
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return true;
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} else if ((((u32)-(s32)val) & 0xFFFF0000) == 0) {
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val = (u32)-(s32)val;
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SUB(rd, rs, Operand2((u8)(val >> 8), 12));
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SUB(rd, rd, Operand2((u8)(val), 0));
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return true;
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} else {
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MOVI2R(scratch, val);
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ADD(rd, rs, scratch);
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return false;
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}
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}
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}
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void ARMXEmitter::ANDI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch)
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{
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if (!TryANDI2R(rd, rs, val)) {
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MOVI2R(scratch, val);
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AND(rd, rs, scratch);
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}
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}
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bool ARMXEmitter::TryANDI2R(ARMReg rd, ARMReg rs, u32 val)
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{
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Operand2 op2;
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bool inverse;
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if (val == 0) {
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// Avoid the ALU, may improve pipeline.
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MOV(rd, 0);
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return true;
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} else if (TryMakeOperand2_AllowInverse(val, op2, &inverse)) {
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if (!inverse) {
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AND(rd, rs, op2);
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} else {
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BIC(rd, rs, op2);
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}
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return true;
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} else {
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int ops = 0;
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for (int i = 0; i < 32; i += 2) {
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@ -221,31 +241,37 @@ void ARMXEmitter::ANDI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch)
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// The worst case is 4 (e.g. 0x55555555.)
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#ifdef HAVE_ARMV7
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if (ops > 3) {
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MOVI2R(scratch, val);
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AND(rd, rs, scratch);
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} else
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return false;
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}
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#endif
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{
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bool first = true;
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for (int i = 0; i < 32; i += 2) {
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u8 bits = RotR(val, i) & 0xFF;
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if ((bits & 3) != 3) {
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u8 rotation = i == 0 ? 0 : 16 - i / 2;
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if (first) {
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BIC(rd, rs, Operand2(~bits, rotation));
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first = false;
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} else {
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BIC(rd, rd, Operand2(~bits, rotation));
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}
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// Well, we took care of these other bits while we were at it.
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i += 8 - 2;
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bool first = true;
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for (int i = 0; i < 32; i += 2) {
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u8 bits = RotR(val, i) & 0xFF;
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if ((bits & 3) != 3) {
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u8 rotation = i == 0 ? 0 : 16 - i / 2;
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if (first) {
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BIC(rd, rs, Operand2(~bits, rotation));
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first = false;
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} else {
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BIC(rd, rd, Operand2(~bits, rotation));
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}
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// Well, we took care of these other bits while we were at it.
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i += 8 - 2;
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}
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}
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return true;
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}
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}
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void ARMXEmitter::CMPI2R(ARMReg rs, u32 val, ARMReg scratch)
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{
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if (!TryCMPI2R(rs, val)) {
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MOVI2R(scratch, val);
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CMP(rs, scratch);
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}
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}
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bool ARMXEmitter::TryCMPI2R(ARMReg rs, u32 val)
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{
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Operand2 op2;
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bool negated;
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@ -254,24 +280,40 @@ void ARMXEmitter::CMPI2R(ARMReg rs, u32 val, ARMReg scratch)
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CMP(rs, op2);
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else
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CMN(rs, op2);
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return true;
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} else {
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MOVI2R(scratch, val);
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CMP(rs, scratch);
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return false;
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}
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}
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void ARMXEmitter::TSTI2R(ARMReg rs, u32 val, ARMReg scratch)
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{
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Operand2 op2;
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if (TryMakeOperand2(val, op2)) {
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TST(rs, op2);
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} else {
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if (!TryTSTI2R(rs, val)) {
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MOVI2R(scratch, val);
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TST(rs, scratch);
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}
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}
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bool ARMXEmitter::TryTSTI2R(ARMReg rs, u32 val)
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{
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Operand2 op2;
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if (TryMakeOperand2(val, op2)) {
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TST(rs, op2);
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return true;
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} else {
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return false;
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}
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}
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void ARMXEmitter::ORI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch)
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{
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if (!TryORI2R(rd, rs, val)) {
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MOVI2R(scratch, val);
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ORR(rd, rs, scratch);
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}
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}
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bool ARMXEmitter::TryORI2R(ARMReg rd, ARMReg rs, u32 val)
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{
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Operand2 op2;
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if (val == 0) {
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@ -279,8 +321,10 @@ void ARMXEmitter::ORI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch)
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if (rd != rs) {
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MOV(rd, rs);
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}
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return true;
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} else if (TryMakeOperand2(val, op2)) {
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ORR(rd, rs, op2);
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return true;
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} else {
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int ops = 0;
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for (int i = 0; i < 32; i += 2) {
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@ -295,30 +339,53 @@ void ARMXEmitter::ORI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch)
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// The worst case is 4 (e.g. 0x55555555.) But MVN can make it 2. Not sure if better.
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bool inversed;
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if (TryMakeOperand2_AllowInverse(val, op2, &inversed) && ops >= 3) {
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MVN(scratch, op2);
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ORR(rd, rs, scratch);
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return false;
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#ifdef HAVE_ARMV7
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} else if (ops > 3) {
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MOVI2R(scratch, val);
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ORR(rd, rs, scratch);
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return false;
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#endif
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} else {
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bool first = true;
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for (int i = 0; i < 32; i += 2) {
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u8 bits = RotR(val, i) & 0xFF;
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if ((bits & 3) != 0) {
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u8 rotation = i == 0 ? 0 : 16 - i / 2;
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if (first) {
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ORR(rd, rs, Operand2(bits, rotation));
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first = false;
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} else {
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ORR(rd, rd, Operand2(bits, rotation));
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}
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// Well, we took care of these other bits while we were at it.
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i += 8 - 2;
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}
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bool first = true;
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for (int i = 0; i < 32; i += 2) {
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u8 bits = RotR(val, i) & 0xFF;
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if ((bits & 3) != 0) {
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u8 rotation = i == 0 ? 0 : 16 - i / 2;
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if (first) {
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ORR(rd, rs, Operand2(bits, rotation));
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first = false;
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} else {
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ORR(rd, rd, Operand2(bits, rotation));
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}
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// Well, we took care of these other bits while we were at it.
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i += 8 - 2;
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}
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}
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return true;
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}
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}
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void ARMXEmitter::EORI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch)
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{
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if (!TryEORI2R(rd, rs, val)) {
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MOVI2R(scratch, val);
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EOR(rd, rs, scratch);
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}
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}
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bool ARMXEmitter::TryEORI2R(ARMReg rd, ARMReg rs, u32 val)
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{
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Operand2 op2;
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if (val == 0) {
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if (rd != rs) {
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MOV(rd, rs);
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}
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return true;
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} else if (TryMakeOperand2(val, op2)) {
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EOR(rd, rs, op2);
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return true;
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} else {
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return false;
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}
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}
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@ -795,10 +795,17 @@ public:
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}
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void ADDI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch);
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bool TryADDI2R(ARMReg rd, ARMReg rs, u32 val);
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void ANDI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch);
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bool TryANDI2R(ARMReg rd, ARMReg rs, u32 val);
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void CMPI2R(ARMReg rs, u32 val, ARMReg scratch);
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bool TryCMPI2R(ARMReg rs, u32 val);
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void TSTI2R(ARMReg rs, u32 val, ARMReg scratch);
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bool TryTSTI2R(ARMReg rs, u32 val);
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void ORI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch);
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bool TryORI2R(ARMReg rd, ARMReg rs, u32 val);
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void EORI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch);
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bool TryEORI2R(ARMReg rd, ARMReg rs, u32 val);
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}; // class ARMXEmitter
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