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Fix some sign comparison warnings.

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This commit is contained in:
Unknown W. Brackets 2013-10-05 10:31:57 -07:00
parent 093255a895
commit 3a1b6fb269
4 changed files with 5 additions and 5 deletions
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2
Core/HLE/__sceAudio.cpp
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@ -290,7 +290,7 @@ void __AudioUpdate() {
continue;
}
if (hwBlockSize * 2 > chans[i].sampleQueue.size()) {
if (hwBlockSize * 2 > (int)chans[i].sampleQueue.size()) {
ERROR_LOG(SCEAUDIO, "Channel %i buffer underrun at %i of %i", i, (int)chans[i].sampleQueue.size() / 2, hwBlockSize);
}

4
Core/HLE/sceAtrac.cpp
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@ -728,7 +728,7 @@ u32 sceAtracDecodeData(int atracID, u32 outAddr, u32 numSamplesAddr, u32 finishF
u32 finish = 0;
int remains = 0;
int ret = _AtracDecodeData(atracID, Memory::GetPointer(outAddr), &numSamples, &finish, &remains);
if (ret != ATRAC_ERROR_BAD_ATRACID) {
if (ret != (int)ATRAC_ERROR_BAD_ATRACID) {
Memory::Write_U32(numSamples, numSamplesAddr);
Memory::Write_U32(finish, finishFlagAddr);
Memory::Write_U32(remains, remainAddr);
@ -1230,7 +1230,7 @@ u32 sceAtracSetData(int atracID, u32 buffer, u32 bufferSize)
atrac->first.addr = buffer;
atrac->first.size = bufferSize;
int ret = atrac->Analyze();
if (ret == 0 && atrac->codecType != atracIDTypes[atracID]) {
if (ret == 0 && (int)atrac->codecType != atracIDTypes[atracID]) {
ERROR_LOG(ME, "sceAtracSetData(%i, %08x, %08x): atracID uses different codec type than data", atracID, buffer, bufferSize);
ret = ATRAC_ERROR_WRONG_CODECTYPE;
}

2
Core/HLE/sceGe.cpp
View File

@ -583,7 +583,7 @@ int sceGeGetMtx(int type, u32 matrixPtr) {
u32 sceGeGetCmd(int cmd) {
INFO_LOG(SCEGE, "sceGeGetCmd(%i)", cmd);
if (cmd >= 0 && cmd < ARRAY_SIZE(gstate.cmdmem)) {
if (cmd >= 0 && cmd < (int)ARRAY_SIZE(gstate.cmdmem)) {
return gstate.cmdmem[cmd]; // Does not mask away the high bits.
} else {
return SCE_KERNEL_ERROR_INVALID_INDEX;

2
Core/MIPS/ARM/ArmCompBranch.cpp
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@ -284,7 +284,7 @@ void Jit::BranchVFPUFlag(MIPSOpcode op, ArmGen::CCFlags cc, bool likely)
CONDITIONAL_NICE_DELAYSLOT;
if (!likely && delaySlotIsNice)
CompileDelaySlot(DELAYSLOT_NICE);
if (delaySlotIsBranch && (delaySlotOp & 0xFFFF) != (signed short)(op & 0xFFFF) - 1)
if (delaySlotIsBranch && (signed short)(delaySlotOp & 0xFFFF) != (signed short)(op & 0xFFFF) - 1)
ERROR_LOG_REPORT(JIT, "VFPU branch in VFPU delay slot at %08x with different target", js.compilerPC);
int imm3 = (op >> 18) & 7;