mirror of
https://github.com/hrydgard/ppsspp.git
synced 2024-11-23 13:30:02 +00:00
mips: MIPSX -> MIPS.
This commit is contained in:
Unknown W. Brackets
parent
4de9b9692e
commit
44fc7c6c71
@ -29,42 +29,42 @@
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#include "CPUDetect.h"
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namespace MIPSGen {
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void MIPSXEmitter::SetCodePtr(u8 *ptr) {
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void MIPSEmitter::SetCodePtr(u8 *ptr) {
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code_ = ptr;
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lastCacheFlushEnd_ = ptr;
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}
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void MIPSXEmitter::ReserveCodeSpace(u32 bytes) {
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void MIPSEmitter::ReserveCodeSpace(u32 bytes) {
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for (u32 i = 0; i < bytes / 4; ++i) {
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BREAK(0);
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}
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}
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const u8 *MIPSXEmitter::AlignCode16() {
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const u8 *MIPSEmitter::AlignCode16() {
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ReserveCodeSpace((-(intptr_t)code_) & 15);
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return code_;
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}
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const u8 *MIPSXEmitter::AlignCodePage() {
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const u8 *MIPSEmitter::AlignCodePage() {
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// TODO: Assuming code pages ought to be 4K?
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ReserveCodeSpace((-(intptr_t)code_) & 4095);
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return code_;
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}
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const u8 *MIPSXEmitter::GetCodePtr() const {
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const u8 *MIPSEmitter::GetCodePtr() const {
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return code_;
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}
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u8 *MIPSXEmitter::GetWritableCodePtr() {
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u8 *MIPSEmitter::GetWritableCodePtr() {
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return code_;
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}
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void MIPSXEmitter::FlushIcache() {
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void MIPSEmitter::FlushIcache() {
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FlushIcacheSection(lastCacheFlushEnd_, code_);
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lastCacheFlushEnd_ = code_;
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}
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void MIPSXEmitter::FlushIcacheSection(u8 *start, u8 *end) {
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void MIPSEmitter::FlushIcacheSection(u8 *start, u8 *end) {
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#if defined(MIPS)
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#ifdef __clang__
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__clear_cache(start, end);
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@ -74,47 +74,47 @@ void MIPSXEmitter::FlushIcacheSection(u8 *start, u8 *end) {
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#endif
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}
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void MIPSXEmitter::BREAK(u32 code) {
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void MIPSEmitter::BREAK(u32 code) {
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// 000000 iiiiiiiiiiiiiiiiiiii 001101
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_dbg_assert_msg_(JIT, code <= 0xfffff, "Bad emitter arguments");
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Write32Fields(26, 0x00, 6, code & 0xfffff, 0, 0x0d);
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}
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FixupBranch MIPSXEmitter::J() {
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FixupBranch MIPSEmitter::J() {
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// 000010 iiiiiiiiiiiiiiiiiiiiiiiiii (fix up)
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FixupBranch b = MakeFixupBranch(BRANCH_26);
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Write32Fields(26, 0x02);
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return b;
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}
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void MIPSXEmitter::J(const void *func) {
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void MIPSEmitter::J(const void *func) {
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SetJumpTarget(J(), func);
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}
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FixupBranch MIPSXEmitter::JAL() {
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FixupBranch MIPSEmitter::JAL() {
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// 000011 iiiiiiiiiiiiiiiiiiiiiiiiii (fix up)
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FixupBranch b = MakeFixupBranch(BRANCH_26);
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Write32Fields(26, 0x03);
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return b;
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}
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void MIPSXEmitter::JAL(const void *func) {
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void MIPSEmitter::JAL(const void *func) {
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SetJumpTarget(JAL(), func);
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}
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void MIPSXEmitter::JR(MIPSReg rs) {
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void MIPSEmitter::JR(MIPSReg rs) {
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// 000000 sssss xxxxxxxxxx hint- 001000 (hint must be 0.)
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_dbg_assert_msg_(JIT, rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 0, 0x08);
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}
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void MIPSXEmitter::JALR(MIPSReg rd, MIPSReg rs) {
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void MIPSEmitter::JALR(MIPSReg rd, MIPSReg rs) {
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// 000000 sssss xxxxx ddddd hint- 001001 (hint must be 0.)
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_dbg_assert_msg_(JIT, rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 11, rd, 0, 0x09);
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}
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FixupBranch MIPSXEmitter::BEQ(MIPSReg rs, MIPSReg rt) {
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FixupBranch MIPSEmitter::BEQ(MIPSReg rs, MIPSReg rt) {
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// 000100 sssss ttttt iiiiiiiiiiiiiii (fix up)
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_dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
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FixupBranch b = MakeFixupBranch(BRANCH_16);
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@ -122,11 +122,11 @@ FixupBranch MIPSXEmitter::BEQ(MIPSReg rs, MIPSReg rt) {
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return b;
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}
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void MIPSXEmitter::BEQ(MIPSReg rs, MIPSReg rt, const void *func) {
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void MIPSEmitter::BEQ(MIPSReg rs, MIPSReg rt, const void *func) {
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SetJumpTarget(BEQ(rs, rt), func);
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}
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FixupBranch MIPSXEmitter::BNE(MIPSReg rs, MIPSReg rt) {
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FixupBranch MIPSEmitter::BNE(MIPSReg rs, MIPSReg rt) {
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// 000101 sssss ttttt iiiiiiiiiiiiiii (fix up)
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_dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
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FixupBranch b = MakeFixupBranch(BRANCH_16);
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@ -134,11 +134,11 @@ FixupBranch MIPSXEmitter::BNE(MIPSReg rs, MIPSReg rt) {
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return b;
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}
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void MIPSXEmitter::BNE(MIPSReg rs, MIPSReg rt, const void *func) {
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void MIPSEmitter::BNE(MIPSReg rs, MIPSReg rt, const void *func) {
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SetJumpTarget(BNE(rs, rt), func);
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}
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FixupBranch MIPSXEmitter::BLEZ(MIPSReg rs) {
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FixupBranch MIPSEmitter::BLEZ(MIPSReg rs) {
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// 000110 sssss xxxxx iiiiiiiiiiiiiii (fix up)
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_dbg_assert_msg_(JIT, rs < F_BASE, "Bad emitter arguments");
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FixupBranch b = MakeFixupBranch(BRANCH_16);
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@ -146,11 +146,11 @@ FixupBranch MIPSXEmitter::BLEZ(MIPSReg rs) {
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return b;
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}
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void MIPSXEmitter::BLEZ(MIPSReg rs, const void *func) {
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void MIPSEmitter::BLEZ(MIPSReg rs, const void *func) {
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SetJumpTarget(BLEZ(rs), func);
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}
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FixupBranch MIPSXEmitter::BGTZ(MIPSReg rs) {
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FixupBranch MIPSEmitter::BGTZ(MIPSReg rs) {
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// 000111 sssss xxxxx iiiiiiiiiiiiiii (fix up)
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_dbg_assert_msg_(JIT, rs < F_BASE, "Bad emitter arguments");
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FixupBranch b = MakeFixupBranch(BRANCH_16);
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@ -158,23 +158,23 @@ FixupBranch MIPSXEmitter::BGTZ(MIPSReg rs) {
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return b;
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}
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void MIPSXEmitter::BGTZ(MIPSReg rs, const void *func) {
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void MIPSEmitter::BGTZ(MIPSReg rs, const void *func) {
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SetJumpTarget(BGTZ(rs), func);
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}
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void MIPSXEmitter::SetJumpTarget(const FixupBranch &branch) {
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void MIPSEmitter::SetJumpTarget(const FixupBranch &branch) {
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SetJumpTarget(branch, code_);
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}
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bool MIPSXEmitter::BInRange(const void *func) {
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bool MIPSEmitter::BInRange(const void *func) {
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return BInRange(code_, func);
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}
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bool MIPSXEmitter::JInRange(const void *func) {
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bool MIPSEmitter::JInRange(const void *func) {
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return JInRange(code_, func);
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}
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void MIPSXEmitter::SetJumpTarget(const FixupBranch &branch, const void *dst) {
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void MIPSEmitter::SetJumpTarget(const FixupBranch &branch, const void *dst) {
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const intptr_t srcp = (intptr_t)branch.ptr;
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const intptr_t dstp = (intptr_t)dst;
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u32 *fixup = (u32 *)branch.ptr;
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@ -193,7 +193,7 @@ void MIPSXEmitter::SetJumpTarget(const FixupBranch &branch, const void *dst) {
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}
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}
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bool MIPSXEmitter::BInRange(const void *src, const void *dst) {
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bool MIPSEmitter::BInRange(const void *src, const void *dst) {
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const intptr_t srcp = (intptr_t)src;
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const intptr_t dstp = (intptr_t)dst;
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@ -202,14 +202,14 @@ bool MIPSXEmitter::BInRange(const void *src, const void *dst) {
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return distance >= -0x8000 && distance < 0x8000;
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}
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bool MIPSXEmitter::JInRange(const void *src, const void *dst) {
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bool MIPSEmitter::JInRange(const void *src, const void *dst) {
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const intptr_t srcp = (intptr_t)src;
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const intptr_t dstp = (intptr_t)dst;
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return (srcp - (srcp & 0x0fffffff)) == (dstp - (dstp & 0x0fffffff));
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}
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void MIPSXEmitter::QuickCallFunction(MIPSReg scratchreg, const void *func) {
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void MIPSEmitter::QuickCallFunction(MIPSReg scratchreg, const void *func) {
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_dbg_assert_msg_(JIT, scratchreg < F_BASE, "Bad emitter arguments");
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if (JInRange(func)) {
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JAL(func);
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@ -220,158 +220,158 @@ void MIPSXEmitter::QuickCallFunction(MIPSReg scratchreg, const void *func) {
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}
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}
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FixupBranch MIPSXEmitter::MakeFixupBranch(FixupBranchType type) {
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FixupBranch MIPSEmitter::MakeFixupBranch(FixupBranchType type) {
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FixupBranch b;
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b.ptr = code_;
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b.type = type;
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return b;
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}
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void MIPSXEmitter::LB(MIPSReg value, MIPSReg base, s16 offset) {
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void MIPSEmitter::LB(MIPSReg value, MIPSReg base, s16 offset) {
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// 100000 sssss ttttt iiiiiiiiiiiiiiii - rs = base, rt = value
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_dbg_assert_msg_(JIT, value < F_BASE && base < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x20, 21, base, 16, value, 0, (u16)offset);
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}
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void MIPSXEmitter::LW(MIPSReg value, MIPSReg base, s16 offset) {
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void MIPSEmitter::LW(MIPSReg value, MIPSReg base, s16 offset) {
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// 100011 sssss ttttt iiiiiiiiiiiiiiii - rs = base, rt = value
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_dbg_assert_msg_(JIT, value < F_BASE && base < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x23, 21, base, 16, value, 0, (u16)offset);
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}
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void MIPSXEmitter::SB(MIPSReg value, MIPSReg base, s16 offset) {
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void MIPSEmitter::SB(MIPSReg value, MIPSReg base, s16 offset) {
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// 101000 sssss ttttt iiiiiiiiiiiiiiii - rs = base, rt = value
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_dbg_assert_msg_(JIT, value < F_BASE && base < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x28, 21, base, 16, value, 0, (u16)offset);
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}
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void MIPSXEmitter::SW(MIPSReg value, MIPSReg base, s16 offset) {
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void MIPSEmitter::SW(MIPSReg value, MIPSReg base, s16 offset) {
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// 101011 sssss ttttt iiiiiiiiiiiiiiii - rs = base, rt = value
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_dbg_assert_msg_(JIT, value < F_BASE && base < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x2b, 21, base, 16, value, 0, (u16)offset);
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}
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void MIPSXEmitter::SLL(MIPSReg rd, MIPSReg rt, u8 sa) {
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void MIPSEmitter::SLL(MIPSReg rd, MIPSReg rt, u8 sa) {
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// 000000 xxxxx ttttt ddddd aaaaa 000000
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_dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && sa <= 0x1f, "Bad emitter arguments");
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Write32Fields(26, 0x00, 16, rt, 11, rd, 6, sa & 0x1f, 0, 0x00);
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}
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void MIPSXEmitter::SRL(MIPSReg rd, MIPSReg rt, u8 sa) {
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void MIPSEmitter::SRL(MIPSReg rd, MIPSReg rt, u8 sa) {
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// 000000 xxxxx ttttt ddddd aaaaa 000010
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_dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && sa <= 0x1f, "Bad emitter arguments");
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Write32Fields(26, 0x00, 16, rt, 11, rd, 6, sa & 0x1f, 0, 0x02);
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}
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void MIPSXEmitter::SRA(MIPSReg rd, MIPSReg rt, u8 sa) {
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void MIPSEmitter::SRA(MIPSReg rd, MIPSReg rt, u8 sa) {
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// 000000 xxxxx ttttt ddddd aaaaa 000011
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_dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && sa <= 0x1f, "Bad emitter arguments");
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Write32Fields(26, 0x00, 16, rt, 11, rd, 6, sa & 0x1f, 0, 0x03);
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}
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void MIPSXEmitter::SLLV(MIPSReg rd, MIPSReg rt, MIPSReg rs) {
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void MIPSEmitter::SLLV(MIPSReg rd, MIPSReg rt, MIPSReg rs) {
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// 000000 sssss ttttt ddddd xxxxx 000100
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_dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x04);
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}
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void MIPSXEmitter::SRLV(MIPSReg rd, MIPSReg rt, MIPSReg rs) {
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void MIPSEmitter::SRLV(MIPSReg rd, MIPSReg rt, MIPSReg rs) {
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// 000000 sssss ttttt ddddd xxxxx 000110
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_dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x06);
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}
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void MIPSXEmitter::SRAV(MIPSReg rd, MIPSReg rt, MIPSReg rs) {
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void MIPSEmitter::SRAV(MIPSReg rd, MIPSReg rt, MIPSReg rs) {
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// 000000 sssss ttttt ddddd xxxxx 000111
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_dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x07);
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}
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void MIPSXEmitter::SLT(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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void MIPSEmitter::SLT(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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// 000000 sssss ttttt ddddd xxxxx 101010
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_dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x2a);
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}
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void MIPSXEmitter::SLTU(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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void MIPSEmitter::SLTU(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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// 000000 sssss ttttt ddddd xxxxx 101011
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_dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x2b);
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}
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void MIPSXEmitter::SLTI(MIPSReg rt, MIPSReg rs, s16 imm) {
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void MIPSEmitter::SLTI(MIPSReg rt, MIPSReg rs, s16 imm) {
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// 001010 sssss ttttt iiiiiiiiiiiiiiii
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_dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x0a, 21, rs, 16, rt, 0, (u16)imm);
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}
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void MIPSXEmitter::SLTIU(MIPSReg rt, MIPSReg rs, s16 imm) {
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void MIPSEmitter::SLTIU(MIPSReg rt, MIPSReg rs, s16 imm) {
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// 001011 sssss ttttt iiiiiiiiiiiiiiii
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_dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x0b, 21, rs, 16, rt, 0, (u16)imm);
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}
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void MIPSXEmitter::ADDU(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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void MIPSEmitter::ADDU(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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// 000000 sssss ttttt ddddd 00000100001
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_dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x21);
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}
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void MIPSXEmitter::SUBU(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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void MIPSEmitter::SUBU(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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// 000000 sssss ttttt ddddd 00000100011
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_dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x23);
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}
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void MIPSXEmitter::ADDIU(MIPSReg rt, MIPSReg rs, s16 imm) {
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void MIPSEmitter::ADDIU(MIPSReg rt, MIPSReg rs, s16 imm) {
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// 001001 sssss ttttt iiiiiiiiiiiiiiii
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_dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x09, 21, rs, 16, rt, 0, (u16)imm);
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}
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void MIPSXEmitter::AND(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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void MIPSEmitter::AND(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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// 000000 sssss ttttt ddddd 00000100100
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_dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x24);
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}
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void MIPSXEmitter::OR(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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void MIPSEmitter::OR(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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// 000000 sssss ttttt ddddd 00000100101
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_dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x25);
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}
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void MIPSXEmitter::XOR(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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void MIPSEmitter::XOR(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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// 000000 sssss ttttt ddddd 00000100110
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_dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x26);
|
||||
}
|
||||
|
||||
void MIPSXEmitter::ANDI(MIPSReg rt, MIPSReg rs, s16 imm) {
|
||||
void MIPSEmitter::ANDI(MIPSReg rt, MIPSReg rs, s16 imm) {
|
||||
// 001100 sssss ttttt iiiiiiiiiiiiiiii
|
||||
_dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
|
||||
Write32Fields(26, 0x0c, 21, rs, 16, rt, 0, (u16)imm);
|
||||
}
|
||||
|
||||
void MIPSXEmitter::ORI(MIPSReg rt, MIPSReg rs, s16 imm) {
|
||||
void MIPSEmitter::ORI(MIPSReg rt, MIPSReg rs, s16 imm) {
|
||||
// 001101 sssss ttttt iiiiiiiiiiiiiiii
|
||||
_dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
|
||||
Write32Fields(26, 0x0d, 21, rs, 16, rt, 0, (u16)imm);
|
||||
}
|
||||
|
||||
void MIPSXEmitter::XORI(MIPSReg rt, MIPSReg rs, s16 imm) {
|
||||
void MIPSEmitter::XORI(MIPSReg rt, MIPSReg rs, s16 imm) {
|
||||
// 001110 sssss ttttt iiiiiiiiiiiiiiii
|
||||
_dbg_assert_msg_(JIT, rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
|
||||
Write32Fields(26, 0x0e, 21, rs, 16, rt, 0, (u16)imm);
|
||||
}
|
||||
|
||||
void MIPSXEmitter::LUI(MIPSReg rt, s16 imm) {
|
||||
void MIPSEmitter::LUI(MIPSReg rt, s16 imm) {
|
||||
// 001111 sssss ttttt iiiiiiiiiiiiiiii
|
||||
_dbg_assert_msg_(JIT, rt < F_BASE, "Bad emitter arguments");
|
||||
Write32Fields(26, 0x0f, 21, rt, 0, (u16)imm);
|
||||
}
|
||||
|
||||
void MIPSXEmitter::DSLL(MIPSReg rd, MIPSReg rt, u8 sa) {
|
||||
void MIPSEmitter::DSLL(MIPSReg rd, MIPSReg rt, u8 sa) {
|
||||
// 000000 xxxxx ttttt ddddd aaaaa 111000 DSLL
|
||||
// 000000 xxxxx ttttt ddddd aaaaa 111100 DSLL32
|
||||
_dbg_assert_msg_(JIT, rd < F_BASE && rt < F_BASE && sa <= 0x3f, "Bad emitter arguments");
|
||||
@ -383,7 +383,7 @@ void MIPSXEmitter::DSLL(MIPSReg rd, MIPSReg rt, u8 sa) {
|
||||
}
|
||||
}
|
||||
|
||||
void MIPSXEmitter::MOVI2R(MIPSReg reg, u64 imm) {
|
||||
void MIPSEmitter::MOVI2R(MIPSReg reg, u64 imm) {
|
||||
_dbg_assert_msg_(JIT, reg < F_BASE, "Bad emitter arguments");
|
||||
// TODO: Assert MIPS64.
|
||||
|
||||
@ -396,7 +396,7 @@ void MIPSXEmitter::MOVI2R(MIPSReg reg, u64 imm) {
|
||||
ORI(reg, reg, (imm >> 0) & 0x0000ffff);
|
||||
}
|
||||
|
||||
void MIPSXEmitter::MOVI2R(MIPSReg reg, u32 imm) {
|
||||
void MIPSEmitter::MOVI2R(MIPSReg reg, u32 imm) {
|
||||
_dbg_assert_msg_(JIT, reg < F_BASE, "Bad emitter arguments");
|
||||
|
||||
if ((imm & 0xffff0000) != 0) {
|
||||
@ -414,7 +414,7 @@ void MIPSXEmitter::MOVI2R(MIPSReg reg, u32 imm) {
|
||||
}
|
||||
}
|
||||
|
||||
void MIPSXCodeBlock::AllocCodeSpace(int size) {
|
||||
void MIPSCodeBlock::AllocCodeSpace(int size) {
|
||||
region_size = size;
|
||||
region = (u8 *)AllocateExecutableMemory(region_size);
|
||||
SetCodePtr(region);
|
||||
@ -422,7 +422,7 @@ void MIPSXCodeBlock::AllocCodeSpace(int size) {
|
||||
|
||||
// Always clear code space with breakpoints, so that if someone accidentally executes
|
||||
// uninitialized, it just breaks into the debugger.
|
||||
void MIPSXCodeBlock::ClearCodeSpace() {
|
||||
void MIPSCodeBlock::ClearCodeSpace() {
|
||||
// Set BREAK instructions on all of it.
|
||||
u32 *region32 = (u32 *)region;
|
||||
for (u32 i = 0; i < region_size / 4; ++i) {
|
||||
@ -431,17 +431,17 @@ void MIPSXCodeBlock::ClearCodeSpace() {
|
||||
ResetCodePtr();
|
||||
}
|
||||
|
||||
void MIPSXCodeBlock::FreeCodeSpace() {
|
||||
void MIPSCodeBlock::FreeCodeSpace() {
|
||||
FreeMemoryPages(region, region_size);
|
||||
region = NULL;
|
||||
region_size = 0;
|
||||
}
|
||||
|
||||
void MIPSXCodeBlock::WriteProtect() {
|
||||
void MIPSCodeBlock::WriteProtect() {
|
||||
WriteProtectMemory(region, region_size, true);
|
||||
}
|
||||
|
||||
void MIPSXCodeBlock::UnWriteProtect() {
|
||||
void MIPSCodeBlock::UnWriteProtect() {
|
||||
UnWriteProtectMemory(region, region_size, false);
|
||||
}
|
||||
|
||||
|
||||
@ -69,14 +69,14 @@ struct FixupBranch {
|
||||
FixupBranchType type;
|
||||
};
|
||||
|
||||
class MIPSXEmitter {
|
||||
class MIPSEmitter {
|
||||
public:
|
||||
MIPSXEmitter() : code_(0), lastCacheFlushEnd_(0) {
|
||||
MIPSEmitter() : code_(0), lastCacheFlushEnd_(0) {
|
||||
}
|
||||
MIPSXEmitter(u8 *code_ptr) : code_(code_ptr), lastCacheFlushEnd_(code_ptr) {
|
||||
MIPSEmitter(u8 *code_ptr) : code_(code_ptr), lastCacheFlushEnd_(code_ptr) {
|
||||
SetCodePtr(code_ptr);
|
||||
}
|
||||
virtual ~MIPSXEmitter() {
|
||||
virtual ~MIPSEmitter() {
|
||||
}
|
||||
|
||||
void SetCodePtr(u8 *ptr);
|
||||
@ -237,11 +237,11 @@ private:
|
||||
// Everything that needs to generate machine code should inherit from this.
|
||||
// You get memory management for free, plus, you can use all the LUI etc functions without
|
||||
// having to prefix them with gen-> or something similar.
|
||||
class MIPSXCodeBlock : public MIPSXEmitter {
|
||||
class MIPSCodeBlock : public MIPSEmitter {
|
||||
public:
|
||||
MIPSXCodeBlock() : region(nullptr), region_size(0) {
|
||||
MIPSCodeBlock() : region(nullptr), region_size(0) {
|
||||
}
|
||||
virtual ~MIPSXCodeBlock() {
|
||||
virtual ~MIPSCodeBlock() {
|
||||
if (region) {
|
||||
FreeCodeSpace();
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user