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Various platform buildfixes
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@ -36,7 +36,8 @@
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static BadAccessHandler g_badAccessHandler;
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#ifdef _WIN32
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// We cannot handle exceptions in UWP builds. Bleh.
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#if PPSSPP_PLATFORM(WINDOWS) && !PPSSPP_PLATFORM(UWP)
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static PVOID g_vectoredExceptionHandle;
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@ -395,6 +395,7 @@ const char *ExceptionTypeAsString(ExceptionType type) {
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const char *MemoryExceptionTypeAsString(MemoryExceptionType type) {
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switch (type) {
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case MemoryExceptionType::UNKNOWN: return "Unknown";
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case MemoryExceptionType::READ_WORD: return "Read Word";
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case MemoryExceptionType::WRITE_WORD: return "Write Word";
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case MemoryExceptionType::READ_BLOCK: return "Read Block";
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@ -81,6 +81,7 @@ bool Core_GetPowerSaving();
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enum class MemoryExceptionType {
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NONE,
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UNKNOWN,
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READ_WORD,
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WRITE_WORD,
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READ_BLOCK,
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@ -97,6 +97,11 @@ void FireMhzChange() {
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}
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void SetClockFrequencyHz(int cpuHz) {
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if (cpuHz <= 0) {
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// Paranoid check, protecting against division by zero and similar nonsense.
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return;
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}
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// When the mhz changes, we keep track of what "time" it was before hand.
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// This way, time always moves forward, even if mhz is changed.
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lastGlobalTimeUs = GetGlobalTimeUs();
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@ -254,7 +254,7 @@ void ArmJit::GenerateFixedCode() {
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crashHandler = GetCodePtr();
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MOVP2R(R0, &coreState);
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MOVI2R(R1, CORE_ERROR);
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MOVI2R(R1, CORE_RUNTIME_ERROR);
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STR(R1, R0, 0);
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B(quitLoop);
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@ -289,7 +289,7 @@ void Arm64Jit::GenerateFixedCode(const JitOptions &jo) {
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crashHandler = GetCodePtr();
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MOVP2R(SCRATCH1_64, &coreState);
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MOVI2R(SCRATCH2, CORE_ERROR);
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MOVI2R(SCRATCH2, CORE_RUNTIME_ERROR);
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STR(INDEX_UNSIGNED, SCRATCH2, SCRATCH1_64, 0);
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B(quitLoop);
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@ -542,6 +542,8 @@ bool HandleFault(uintptr_t hostAddress, void *ctx) {
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} else {
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type = MemoryExceptionType::READ_WORD;
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}
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} else {
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type = MemoryExceptionType::UNKNOWN;
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}
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if (success && g_Config.bIgnoreBadMemAccess) {
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@ -265,17 +265,15 @@ static void BranchExceptionAndSystem(uint32_t w, uint64_t addr, Instruction *ins
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}
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}
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void Arm64AnalyzeLoadStore(uint64_t addr, uint32_t w, Arm64LSInstructionInfo *info) {
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bool Arm64AnalyzeLoadStore(uint64_t addr, uint32_t w, Arm64LSInstructionInfo *info) {
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*info = {};
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info->instructionSize = 4;
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int id = (w >> 25) & 0xF;
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switch (id) {
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case 4: case 6: case 0xC: case 0xE:
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info->isLoadOrStore = true;
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break;
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default:
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ERROR_LOG(CPU, "Tried to disassemble %08x at %p as a load/store instruction", w, (void *)addr);
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return; // not the expected instruction
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return false; // not the expected instruction
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}
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info->size = w >> 30;
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@ -298,6 +296,7 @@ void Arm64AnalyzeLoadStore(uint64_t addr, uint32_t w, Arm64LSInstructionInfo *in
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info->isPairLoadStore = true;
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// TODO
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}
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return true;
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}
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static void LoadStore(uint32_t w, uint64_t addr, Instruction *instr) {
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@ -18,7 +18,7 @@
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// Basic ARM64 disassembler.
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// No promises of accuracy, mostly just made to debug JIT code.
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#include <stdint.h>
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#include <cstdint>
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typedef bool (*SymbolCallback)(char *buffer, int bufsize, uint8_t *address);
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@ -28,8 +28,6 @@ void Arm64Dis(uint64_t addr, uint32_t w, char *output, int bufsize, bool include
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struct Arm64LSInstructionInfo {
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int instructionSize;
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bool isLoadOrStore;
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bool isIntegerLoadStore;
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bool isFPLoadStore;
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bool isPairLoadStore;
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@ -44,4 +42,4 @@ struct Arm64LSInstructionInfo {
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// TODO: more.
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};
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void Arm64AnalyzeLoadStore(uint64_t addr, uint32_t op, Arm64LSInstructionInfo *info);
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bool Arm64AnalyzeLoadStore(uint64_t addr, uint32_t op, Arm64LSInstructionInfo *info);
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@ -760,11 +760,13 @@ static bool DisasmNeon(uint32_t op, char *text) {
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return false;
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}
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void ArmAnalyzeLoadStore(uint32_t addr, uint32_t op, ArmLSInstructionInfo *info) {
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bool ArmAnalyzeLoadStore(uint32_t addr, uint32_t op, ArmLSInstructionInfo *info) {
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*info = {};
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info->instructionSize = 4;
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// TODO
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return false;
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}
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@ -47,4 +47,4 @@ struct ArmLSInstructionInfo {
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// TODO: more.
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};
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void ArmAnalyzeLoadStore(uint32_t addr, uint32_t op, ArmLSInstructionInfo *info);
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bool ArmAnalyzeLoadStore(uint32_t addr, uint32_t op, ArmLSInstructionInfo *info);
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