diff --git a/Core/MIPS/x86/CompFPU.cpp b/Core/MIPS/x86/CompFPU.cpp
index 2f7164d372..0f6f0ef951 100644
--- a/Core/MIPS/x86/CompFPU.cpp
+++ b/Core/MIPS/x86/CompFPU.cpp
@@ -340,19 +340,21 @@ void Jit::Comp_mxc1(MIPSOpcode op) {
 
 	switch ((op >> 21) & 0x1f) {
 	case 0: // R(rt) = FI(fs); break; //mfc1
-		if (rt != MIPS_REG_ZERO) {
-			gpr.MapReg(rt, false, true);
-			// If fs is not mapped, most likely it's being abandoned.
-			// Just load from memory in that case.
-			if (fpr.R(fs).IsSimpleReg()) {
-				MOVD_xmm(gpr.R(rt), fpr.RX(fs));
-			} else {
-				MOV(32, gpr.R(rt), fpr.R(fs));
-			}
+		if (rt == MIPS_REG_ZERO)
+			return;
+		gpr.MapReg(rt, false, true);
+		// If fs is not mapped, most likely it's being abandoned.
+		// Just load from memory in that case.
+		if (fpr.R(fs).IsSimpleReg()) {
+			MOVD_xmm(gpr.R(rt), fpr.RX(fs));
+		} else {
+			MOV(32, gpr.R(rt), fpr.R(fs));
 		}
 		break;
 
 	case 2: // R(rt) = currentMIPS->ReadFCR(fs); break; //cfc1
+		if (rt == MIPS_REG_ZERO)
+			return;
 		if (fs == 31) {
 			bool wasImm = gpr.IsImm(MIPS_REG_FPCOND);
 			if (!wasImm) {
diff --git a/Core/MIPS/x86/CompVFPU.cpp b/Core/MIPS/x86/CompVFPU.cpp
index d5daef409a..622e5cc174 100644
--- a/Core/MIPS/x86/CompVFPU.cpp
+++ b/Core/MIPS/x86/CompVFPU.cpp
@@ -449,7 +449,7 @@ void Jit::Comp_VVectorInit(MIPSOpcode op) {
 	switch ((op >> 16) & 0xF)
 	{
 	case 6: // v=zeros; break;  //vzero
-		MOVSS(XMM0, M(&zero));
+		XORPS(XMM0, R(XMM0));
 		break;
 	case 7: // v=ones; break;   //vone
 		MOVSS(XMM0, M(&one));