More RIP fixes

This commit is contained in:
Henrik Rydgård 2017-07-07 15:46:14 +02:00
parent f7fea57bb6
commit 8d86463b1a
4 changed files with 7 additions and 8 deletions

View File

@ -157,7 +157,7 @@ enum class CPUCore;
// Workaround for compilers that don't like dynamic indexing in offsetof
#define MIPSSTATE_VAR_ELEM32(x, i) MDisp(X64JitConstants::CTXREG, \
(int)(offsetof(MIPSState, x) - offsetof(MIPSState, f[0]) + i * 4))
(int)(offsetof(MIPSState, x) - offsetof(MIPSState, f[0]) + (i) * 4))
// To get RIP/relative addressing (requires tight memory control so generated code isn't too far from the binary, and a reachable variable called mips):
// #define MIPSSTATE_VAR(x) M(&mips->x)

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@ -151,7 +151,6 @@ void Jit::Comp_FPULS(MIPSOpcode op) {
}
}
static const u64 MEMORY_ALIGNED16(ssOneBits[2]) = {0x0000000100000001ULL, 0x0000000100000001ULL};
static const u64 MEMORY_ALIGNED16(ssSignBits2[2]) = {0x8000000080000000ULL, 0x8000000080000000ULL};
static const u64 MEMORY_ALIGNED16(ssNoSignMask[2]) = {0x7FFFFFFF7FFFFFFFULL, 0x7FFFFFFF7FFFFFFFULL};
@ -312,14 +311,13 @@ void Jit::Comp_FPU2op(MIPSOpcode op) {
}
break;
case 4: //F(fd) = sqrtf(F(fs)); break; //sqrt
fpr.SpillLock(fd, fs);
fpr.MapReg(fd, fd == fs, true);
SQRTSS(fpr.RX(fd), fpr.R(fs));
break;
case 13: //FsI(fd) = F(fs)>=0 ? (int)floorf(F(fs)) : (int)ceilf(F(fs)); break;//trunc.w.s
case 13: //FsI(fd) = F(fs)>=0 ? (int)floorf(F(fs)) : (int)ceilf(F(fs)); break; //trunc.w.s
execRounding(&XEmitter::CVTTSS2SI, -1);
break;

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@ -1465,7 +1465,8 @@ void Jit::Comp_Vcmp(MIPSOpcode op) {
PCMPEQW(XMM1, R(XMM1));
XORPS(XMM0, R(XMM1));
}
ANDPS(XMM0, M(vcmpMask[n - 1]));
MOV(PTRBITS, R(TEMPREG), ImmPtr(&vcmpMask[n - 1]));
ANDPS(XMM0, MatR(TEMPREG));
MOVAPS(MIPSSTATE_VAR(vcmpResult), XMM0);
MOV(32, R(TEMPREG), MIPSSTATE_VAR(vcmpResult[0]));
@ -2981,7 +2982,7 @@ void Jit::Comp_Vmmul(MIPSOpcode op) {
void Jit::Comp_Vmscl(MIPSOpcode op) {
CONDITIONAL_DISABLE;
// TODO: This probably ignores prefixes?
// TODO: This op probably ignores prefixes?
if (js.HasUnknownPrefix())
DISABLE;

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@ -896,11 +896,11 @@ OpArg FPURegCache::GetDefaultLocation(int reg) const {
if (useRip_) {
return M(&mips->v[voffset[reg - 32]]); // rip accessible
} else {
return MIPSSTATE_VAR_ELEM32(v[0], voffset[reg - 32]); // rip accessible
return MIPSSTATE_VAR_ELEM32(v[0], voffset[reg - 32]);
}
} else {
if (useRip_) {
return M(&mips->tempValues[reg - 32 - 128]);
return M(&mips->tempValues[reg - 32 - 128]); // rip accessible
} else {
return MIPSSTATE_VAR_ELEM32(tempValues[0], reg - 32 - 128);
}