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More RIP fixes
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@ -157,7 +157,7 @@ enum class CPUCore;
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// Workaround for compilers that don't like dynamic indexing in offsetof
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#define MIPSSTATE_VAR_ELEM32(x, i) MDisp(X64JitConstants::CTXREG, \
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(int)(offsetof(MIPSState, x) - offsetof(MIPSState, f[0]) + i * 4))
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(int)(offsetof(MIPSState, x) - offsetof(MIPSState, f[0]) + (i) * 4))
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// To get RIP/relative addressing (requires tight memory control so generated code isn't too far from the binary, and a reachable variable called mips):
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// #define MIPSSTATE_VAR(x) M(&mips->x)
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@ -151,7 +151,6 @@ void Jit::Comp_FPULS(MIPSOpcode op) {
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}
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}
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static const u64 MEMORY_ALIGNED16(ssOneBits[2]) = {0x0000000100000001ULL, 0x0000000100000001ULL};
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static const u64 MEMORY_ALIGNED16(ssSignBits2[2]) = {0x8000000080000000ULL, 0x8000000080000000ULL};
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static const u64 MEMORY_ALIGNED16(ssNoSignMask[2]) = {0x7FFFFFFF7FFFFFFFULL, 0x7FFFFFFF7FFFFFFFULL};
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@ -312,14 +311,13 @@ void Jit::Comp_FPU2op(MIPSOpcode op) {
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}
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break;
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case 4: //F(fd) = sqrtf(F(fs)); break; //sqrt
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fpr.SpillLock(fd, fs);
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fpr.MapReg(fd, fd == fs, true);
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SQRTSS(fpr.RX(fd), fpr.R(fs));
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break;
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case 13: //FsI(fd) = F(fs)>=0 ? (int)floorf(F(fs)) : (int)ceilf(F(fs)); break;//trunc.w.s
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case 13: //FsI(fd) = F(fs)>=0 ? (int)floorf(F(fs)) : (int)ceilf(F(fs)); break; //trunc.w.s
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execRounding(&XEmitter::CVTTSS2SI, -1);
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break;
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@ -1465,7 +1465,8 @@ void Jit::Comp_Vcmp(MIPSOpcode op) {
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PCMPEQW(XMM1, R(XMM1));
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XORPS(XMM0, R(XMM1));
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}
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ANDPS(XMM0, M(vcmpMask[n - 1]));
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MOV(PTRBITS, R(TEMPREG), ImmPtr(&vcmpMask[n - 1]));
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ANDPS(XMM0, MatR(TEMPREG));
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MOVAPS(MIPSSTATE_VAR(vcmpResult), XMM0);
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MOV(32, R(TEMPREG), MIPSSTATE_VAR(vcmpResult[0]));
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@ -2981,7 +2982,7 @@ void Jit::Comp_Vmmul(MIPSOpcode op) {
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void Jit::Comp_Vmscl(MIPSOpcode op) {
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CONDITIONAL_DISABLE;
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// TODO: This probably ignores prefixes?
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// TODO: This op probably ignores prefixes?
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if (js.HasUnknownPrefix())
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DISABLE;
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@ -896,11 +896,11 @@ OpArg FPURegCache::GetDefaultLocation(int reg) const {
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if (useRip_) {
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return M(&mips->v[voffset[reg - 32]]); // rip accessible
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} else {
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return MIPSSTATE_VAR_ELEM32(v[0], voffset[reg - 32]); // rip accessible
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return MIPSSTATE_VAR_ELEM32(v[0], voffset[reg - 32]);
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}
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} else {
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if (useRip_) {
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return M(&mips->tempValues[reg - 32 - 128]);
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return M(&mips->tempValues[reg - 32 - 128]); // rip accessible
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} else {
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return MIPSSTATE_VAR_ELEM32(tempValues[0], reg - 32 - 128);
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}
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