samplerjit: Tiny dependency optimizations.

This had a small but measureable impact (~0.3%.)
This commit is contained in:
Unknown W. Brackets 2021-12-31 08:11:57 -08:00
parent fc3688d273
commit 8ea67b571b

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@ -1908,17 +1908,19 @@ bool SamplerJitCache::Jit_GetTexelCoordsQuad(const SamplerID &id) {
SUB(32, R(xReg), Imm8(128 - 12));
NEG(32, R(yReg));
SUB(32, R(yReg), Imm8(128 - 12));
SHL(64, R(yReg), Imm8(32));
OR(64, R(xReg), R(yReg));
// Add them in. We do this in the SSE because we have more to do there...
X64Reg tempXYReg = regCache_.Alloc(RegCache::VEC_TEMP0);
MOVD_xmm(tempXYReg, R(xReg));
MOVQ_xmm(tempXYReg, R(xReg));
PADDD(sReg, R(tempXYReg));
if (regCache_.Has(RegCache::VEC_U1)) {
X64Reg u1Reg = regCache_.Find(RegCache::VEC_U1);
PADDD(u1Reg, R(tempXYReg));
regCache_.Unlock(u1Reg, RegCache::VEC_U1);
}
MOVD_xmm(tempXYReg, R(yReg));
PSHUFD(tempXYReg, R(tempXYReg), _MM_SHUFFLE(1, 1, 1, 1));
PADDD(tReg, R(tempXYReg));
if (regCache_.Has(RegCache::VEC_V1)) {
X64Reg v1Reg = regCache_.Find(RegCache::VEC_V1);
@ -1962,10 +1964,10 @@ bool SamplerJitCache::Jit_GetTexelCoordsQuad(const SamplerID &id) {
regCache_.Unlock(fracVReg, RegCache::GEN_ARG_FRAC_V);
// Get rid of the fractional bits, and spread out.
PSRAD(sReg, 8);
PSRAD(tReg, 8);
PSHUFD(sReg, R(sReg), _MM_SHUFFLE(0, 0, 0, 0));
PSHUFD(tReg, R(tReg), _MM_SHUFFLE(0, 0, 0, 0));
PSRAD(sReg, 8);
PSRAD(tReg, 8);
// Add U/V values for the next coords.
PADDD(sReg, M(constUNext_));
PADDD(tReg, M(constVNext_));
@ -1973,10 +1975,10 @@ bool SamplerJitCache::Jit_GetTexelCoordsQuad(const SamplerID &id) {
if (regCache_.Has(RegCache::VEC_U1)) {
X64Reg u1Reg = regCache_.Find(RegCache::VEC_U1);
X64Reg v1Reg = regCache_.Find(RegCache::VEC_V1);
PSRAD(u1Reg, 8);
PSRAD(v1Reg, 8);
PSHUFD(u1Reg, R(u1Reg), _MM_SHUFFLE(0, 0, 0, 0));
PSHUFD(v1Reg, R(v1Reg), _MM_SHUFFLE(0, 0, 0, 0));
PSRAD(u1Reg, 8);
PSRAD(v1Reg, 8);
PADDD(u1Reg, M(constUNext_));
PADDD(v1Reg, M(constVNext_));
regCache_.Unlock(u1Reg, RegCache::VEC_U1);