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Return a similar dlist id range to the PSP.
At least this top part seems to match, the other bits seem randomish. But, there may be some game out there thinking that if the top bits aren't set it's invalid or something.
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@ -337,6 +337,8 @@ u32 sceGeListEnQueue(u32 listAddress, u32 stallAddress, int callbackId,
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optParam = optParamAddr;
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u32 listID = gpu->EnqueueList(listAddress, stallAddress, __GeSubIntrBase(callbackId), optParam, false);
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if ((int)listID >= 0)
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listID = 0x35000000 | listID;
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DEBUG_LOG(SCEGE, "List %i enqueued.", listID);
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return listID;
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@ -352,6 +354,8 @@ u32 sceGeListEnQueueHead(u32 listAddress, u32 stallAddress, int callbackId,
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optParam = optParamAddr;
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u32 listID = gpu->EnqueueList(listAddress, stallAddress, __GeSubIntrBase(callbackId), optParam, true);
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if ((int)listID >= 0)
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listID = 0x35000000 ^ listID;
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DEBUG_LOG(SCEGE, "List %i enqueued.", listID);
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return listID;
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@ -360,7 +364,7 @@ u32 sceGeListEnQueueHead(u32 listAddress, u32 stallAddress, int callbackId,
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int sceGeListDeQueue(u32 listID)
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{
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WARN_LOG(SCEGE, "sceGeListDeQueue(%08x)", listID);
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int result = gpu->DequeueList(listID);
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int result = gpu->DequeueList(0x35000000 ^ listID);
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hleReSchedule("dlist dequeued");
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return result;
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}
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@ -370,13 +374,13 @@ int sceGeListUpdateStallAddr(u32 displayListID, u32 stallAddress)
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DEBUG_LOG(SCEGE, "sceGeListUpdateStallAddr(dlid=%i, stalladdr=%08x)", displayListID, stallAddress);
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hleEatCycles(190);
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CoreTiming::Advance();
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return gpu->UpdateStall(displayListID, stallAddress);
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return gpu->UpdateStall(0x35000000 ^ displayListID, stallAddress);
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}
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int sceGeListSync(u32 displayListID, u32 mode) //0 : wait for completion 1:check and return
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{
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DEBUG_LOG(SCEGE, "sceGeListSync(dlid=%08x, mode=%08x)", displayListID, mode);
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return gpu->ListSync(displayListID, mode);
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return gpu->ListSync(0x35000000 ^ displayListID, mode);
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}
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u32 sceGeDrawSync(u32 mode)
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