Emulator-Archive/ppsspp
1
0
Fork 0
mirror of https://github.com/hrydgard/ppsspp.git synced 2025-02-08 14:58:36 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Assert some unlikely buffer overflows.

Browse Source
This commit is contained in:
Unknown W. Brackets 2013-10-26 18:30:55 -07:00
parent 597b2fe597
commit 95c68ae1e7
3 changed files with 7 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Core/HLE/sceKernelThread.cpp
View File

@ -1580,7 +1580,7 @@ u32 sceKernelGetThreadmanIdList(u32 type, u32 readBufPtr, u32 readBufSize, u32 i
void __KernelSaveContext(ThreadContext *ctx, bool vfpuEnabled)
{
// r and f are immediately next to each other and must be.
memcpy(ctx->r, currentMIPS->r, sizeof(ctx->r) + sizeof(ctx->f));
memcpy((void *)ctx->r, (void *)currentMIPS->r, sizeof(ctx->r) + sizeof(ctx->f));
if (vfpuEnabled)
{
@ -1595,7 +1595,7 @@ void __KernelSaveContext(ThreadContext *ctx, bool vfpuEnabled)
void __KernelLoadContext(ThreadContext *ctx, bool vfpuEnabled)
{
// r and f are immediately next to each other and must be.
memcpy(currentMIPS->r, ctx->r, sizeof(ctx->r) + sizeof(ctx->f));
memcpy((void *)currentMIPS->r, (void *)ctx->r, sizeof(ctx->r) + sizeof(ctx->f));
if (vfpuEnabled)
{

2
Core/MIPS/x86/RegCache.cpp
View File

@ -146,7 +146,7 @@ void GPRRegCache::FlushR(X64Reg reg)
{
if (reg >= NUM_X_REGS)
PanicAlert("Flushing non existent reg");
if (!xregs[reg].free)
else if (!xregs[reg].free)
StoreFromRegister(xregs[reg].mipsReg);
}

8
Core/MIPS/x86/RegCacheFPU.cpp
View File

@ -114,7 +114,7 @@ void FPURegCache::BindToRegister(const int i, bool doLoad, bool makeDirty) {
if (!regs[i].away) {
// Reg is at home in the memory register file. Let's pull it out.
X64Reg xr = GetFreeXReg();
_assert_msg_(JIT, xr < NUM_X_FPREGS, "WTF - load - invalid reg");
_assert_msg_(JIT, xr >= 0 && xr < NUM_X_FPREGS, "WTF - load - invalid reg");
xregs[xr].mipsReg = i;
xregs[xr].dirty = makeDirty;
OpArg newloc = ::Gen::R(xr);
@ -137,7 +137,7 @@ void FPURegCache::StoreFromRegister(int i) {
_assert_msg_(JIT, !regs[i].location.IsImm(), "WTF - store - imm");
if (regs[i].away) {
X64Reg xr = regs[i].location.GetSimpleReg();
_assert_msg_(JIT, xr < NUM_X_FPREGS, "WTF - store - invalid reg");
_assert_msg_(JIT, xr >= 0 && xr < NUM_X_FPREGS, "WTF - store - invalid reg");
xregs[xr].dirty = false;
xregs[xr].mipsReg = -1;
OpArg newLoc = GetDefaultLocation(i);
@ -153,7 +153,7 @@ void FPURegCache::DiscardR(int i) {
_assert_msg_(JIT, !regs[i].location.IsImm(), "FPU can't handle imm yet.");
if (regs[i].away) {
X64Reg xr = regs[i].location.GetSimpleReg();
_assert_msg_(JIT, xr < NUM_X_FPREGS, "DiscardR: MipsReg had bad X64Reg");
_assert_msg_(JIT, xr >= 0 && xr < NUM_X_FPREGS, "DiscardR: MipsReg had bad X64Reg");
// Note that we DO NOT write it back here. That's the whole point of Discard.
xregs[xr].dirty = false;
xregs[xr].mipsReg = -1;
@ -266,7 +266,7 @@ X64Reg FPURegCache::GetFreeXReg() {
void FPURegCache::FlushX(X64Reg reg) {
if (reg >= NUM_X_FPREGS)
PanicAlert("Flushing non existent reg");
if (xregs[reg].mipsReg != -1) {
else if (xregs[reg].mipsReg != -1) {
StoreFromRegister(xregs[reg].mipsReg);
}
}