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X64/X86: Even more use of the context register

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This commit is contained in:
Henrik Rydgård 2017-07-05 13:21:35 +02:00
parent 730e9ced6c
commit 99d23fb021
3 changed files with 14 additions and 12 deletions
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10
Core/MIPS/x86/Jit.cpp
View File

@ -378,9 +378,9 @@ const u8 *Jit::DoJit(u32 em_address, JitBlock *b)
CMP(32, M(&coreState), Imm32(CORE_NEXTFRAME));
FixupBranch skipCheck = J_CC(CC_LE);
if (js.afterOp & JitState::AFTER_REWIND_PC_BAD_STATE)
MOV(32, M(&mips_->pc), Imm32(GetCompilerPC()));
MOV(32, MIPSSTATE_VAR(pc), Imm32(GetCompilerPC()));
else
MOV(32, M(&mips_->pc), Imm32(GetCompilerPC() + 4));
MOV(32, MIPSSTATE_VAR(pc), Imm32(GetCompilerPC() + 4));
WriteSyscallExit();
SetJumpTarget(skipCheck);
@ -510,7 +510,7 @@ void Jit::UnlinkBlock(u8 *checkedEntry, u32 originalAddress) {
// Not entirely ideal, but .. pretty good.
// Spurious entrances from previously linked blocks can only come through checkedEntry
XEmitter emit(checkedEntry);
emit.MOV(32, M(&mips_->pc), Imm32(originalAddress));
emit.MOV(32, MIPSSTATE_VAR(pc), Imm32(originalAddress));
emit.JMP(MIPSComp::jit->GetDispatcher(), true);
if (PlatformIsWXExclusive()) {
ProtectMemoryPages(checkedEntry, 16, MEM_PROT_READ | MEM_PROT_EXEC);
@ -742,7 +742,7 @@ void Jit::WriteExitDestInReg(X64Reg reg) {
SetJumpTarget(skip);
}
SUB(32, M(&mips_->downcount), Imm8(0));
SUB(32, MIPSSTATE_VAR(downcount), Imm8(0));
JMP(dispatcherCheckCoreState, true);
} else if (reg == EAX) {
J_CC(CC_NS, dispatcherInEAXNoCheck, true);
@ -766,7 +766,7 @@ bool Jit::CheckJitBreakpoint(u32 addr, int downcountOffset) {
if (CBreakPoints::IsAddressBreakPoint(addr)) {
SaveFlags();
FlushAll();
MOV(32, M(&mips_->pc), Imm32(GetCompilerPC()));
MOV(32, MIPSSTATE_VAR(pc), Imm32(GetCompilerPC()));
RestoreRoundingMode();
ABI_CallFunction(&JitBreakpoint);

10
Core/MIPS/x86/RegCache.cpp
View File

@ -327,16 +327,16 @@ OpArg GPRRegCache::GetDefaultLocation(MIPSGPReg reg) const {
}
switch (reg) {
case MIPS_REG_HI:
return M(&mips->hi);
return MIPSSTATE_VAR(hi);
case MIPS_REG_LO:
return M(&mips->lo);
return MIPSSTATE_VAR(lo);
case MIPS_REG_FPCOND:
return M(&mips->fpcond);
return MIPSSTATE_VAR(fpcond);
case MIPS_REG_VFPUCC:
return M(&mips->vfpuCtrl[VFPU_CTRL_CC]);
return MIPSSTATE_VAR(vfpuCtrl[VFPU_CTRL_CC]);
default:
ERROR_LOG_REPORT(JIT, "bad mips register %i", reg);
return M(&mips->r[0]);
return MIPSSTATE_VAR(r[0]);
}
}

6
GPU/Common/VertexDecoderX86.cpp
View File

@ -231,9 +231,11 @@ JittedVertexDecoder VertexDecoderJitCache::Compile(const VertexDecoder &dec, int
MOVSS(fpScratchReg, MDisp(tempReg1, 4));
UNPCKLPS(fpScaleOffsetReg, R(fpScratchReg));
if ((dec.VertexType() & GE_VTYPE_TC_MASK) == GE_VTYPE_TC_8BIT) {
MULPS(fpScaleOffsetReg, M(&by128));
MOV(PTRBITS, R(tempReg2), ImmPtr(&by128));
MULPS(fpScaleOffsetReg, MatR(tempReg2));
} else if ((dec.VertexType() & GE_VTYPE_TC_MASK) == GE_VTYPE_TC_16BIT) {
MULPS(fpScaleOffsetReg, M(&by32768));
MOV(PTRBITS, R(tempReg2), ImmPtr(&by32768));
MULPS(fpScaleOffsetReg, MatR(tempReg2));
}
MOVSS(fpScratchReg, MDisp(tempReg1, 8));
MOVSS(fpScratchReg2, MDisp(tempReg1, 12));