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softgpu: Use dirty flags for render overlap checks.
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parent
77db9c818f
commit
a27da25cd6
@ -165,23 +165,6 @@ void BinManager::UpdateState() {
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ComputeRasterizerState(&states_[stateIndex_]);
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states_[stateIndex_].samplerID.cached.clut = cluts_[clutIndex_].readable;
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DrawingCoords scissorTL(gstate.getScissorX1(), gstate.getScissorY1());
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DrawingCoords scissorBR(gstate.getScissorX2(), gstate.getScissorY2());
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ScreenCoords screenScissorTL = TransformUnit::DrawingToScreen(scissorTL, 0);
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ScreenCoords screenScissorBR = TransformUnit::DrawingToScreen(scissorBR, 0);
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scissor_.x1 = screenScissorTL.x;
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scissor_.y1 = screenScissorTL.y;
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scissor_.x2 = screenScissorBR.x + 15;
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scissor_.y2 = screenScissorBR.y + 15;
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// Our bin sizes are based on offset, so if that changes we have to flush.
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if (queueOffsetX_ != gstate.getOffsetX16() || queueOffsetY_ != gstate.getOffsetY16()) {
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Flush("offset");
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queueOffsetX_ = gstate.getOffsetX16();
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queueOffsetY_ = gstate.getOffsetY16();
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}
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if (lastFlipstats_ != gpuStats.numFlips) {
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lastFlipstats_ = gpuStats.numFlips;
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ResetStats();
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@ -193,31 +176,56 @@ void BinManager::UpdateState() {
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if (HasTextureWrite(state))
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Flush("tex");
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// Okay, now update what's pending.
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constexpr uint32_t mirrorMask = 0x0FFFFFFF & ~0x00600000;
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const uint32_t bpp = state.pixelID.FBFormat() == GE_FORMAT_8888 ? 4 : 2;
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pendingWrites_[0].Expand(gstate.getFrameBufAddress() & mirrorMask, bpp, gstate.FrameBufStride(), scissorTL, scissorBR);
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if (state.pixelID.depthWrite)
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pendingWrites_[1].Expand(gstate.getDepthBufAddress() & mirrorMask, 2, gstate.DepthBufStride(), scissorTL, scissorBR);
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if (dirty_ & SoftDirty::BINNER_RANGE) {
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DrawingCoords scissorTL(gstate.getScissorX1(), gstate.getScissorY1());
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DrawingCoords scissorBR(gstate.getScissorX2(), gstate.getScissorY2());
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ScreenCoords screenScissorTL = TransformUnit::DrawingToScreen(scissorTL, 0);
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ScreenCoords screenScissorBR = TransformUnit::DrawingToScreen(scissorBR, 0);
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// Disallow threads when rendering to the target, even offset.
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bool selfRender = HasTextureWrite(state);
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int newMaxTasks = selfRender ? 1 : g_threadManager.GetNumLooperThreads();
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if (newMaxTasks > MAX_POSSIBLE_TASKS)
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newMaxTasks = MAX_POSSIBLE_TASKS;
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// We don't want to overlap wrong, so flush any pending.
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if (maxTasks_ != newMaxTasks) {
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maxTasks_ = newMaxTasks;
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Flush("selfrender");
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scissor_.x1 = screenScissorTL.x;
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scissor_.y1 = screenScissorTL.y;
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scissor_.x2 = screenScissorBR.x + 15;
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scissor_.y2 = screenScissorBR.y + 15;
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// Our bin sizes are based on offset, so if that changes we have to flush.
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if (queueOffsetX_ != gstate.getOffsetX16() || queueOffsetY_ != gstate.getOffsetY16()) {
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Flush("offset");
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queueOffsetX_ = gstate.getOffsetX16();
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queueOffsetY_ = gstate.getOffsetY16();
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}
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// Okay, now update what's pending.
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constexpr uint32_t mirrorMask = 0x0FFFFFFF & ~0x00600000;
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const uint32_t bpp = state.pixelID.FBFormat() == GE_FORMAT_8888 ? 4 : 2;
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pendingWrites_[0].Expand(gstate.getFrameBufAddress() & mirrorMask, bpp, gstate.FrameBufStride(), scissorTL, scissorBR);
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if (state.pixelID.depthWrite)
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pendingWrites_[1].Expand(gstate.getDepthBufAddress() & mirrorMask, 2, gstate.DepthBufStride(), scissorTL, scissorBR);
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dirty_ &= ~SoftDirty::BINNER_RANGE;
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}
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// Lastly, we have to check if we're newly writing depth we were texturing before.
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// This happens in Call of Duty (depth clear after depth texture), for example.
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if (!hadDepth && state.pixelID.depthWrite) {
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for (size_t i = 0; i < states_.Size(); ++i) {
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if (HasTextureWrite(states_.Peek(i)))
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Flush("selfdepth");
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if (dirty_ & SoftDirty::BINNER_OVERLAP) {
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// Disallow threads when rendering to the target, even offset.
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bool selfRender = HasTextureWrite(state);
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int newMaxTasks = selfRender ? 1 : g_threadManager.GetNumLooperThreads();
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if (newMaxTasks > MAX_POSSIBLE_TASKS)
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newMaxTasks = MAX_POSSIBLE_TASKS;
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// We don't want to overlap wrong, so flush any pending.
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if (maxTasks_ != newMaxTasks) {
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maxTasks_ = newMaxTasks;
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Flush("selfrender");
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}
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// Lastly, we have to check if we're newly writing depth we were texturing before.
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// This happens in Call of Duty (depth clear after depth texture), for example.
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if (!hadDepth && state.pixelID.depthWrite) {
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for (size_t i = 0; i < states_.Size(); ++i) {
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if (HasTextureWrite(states_.Peek(i))) {
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Flush("selfdepth");
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}
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}
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}
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dirty_ &= ~SoftDirty::BINNER_OVERLAP;
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}
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}
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@ -435,12 +443,13 @@ void BinManager::Flush(const char *reason) {
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queueRange_.y1 = 0x7FFFFFFF;
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queueRange_.x2 = 0;
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queueRange_.y2 = 0;
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queueOffsetX_ = -1;
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queueOffsetY_ = -1;
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for (auto &pending : pendingWrites_)
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pending.base = 0;
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// We'll need to set the pending writes again, since we just flushed it.
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dirty_ |= SoftDirty::BINNER_RANGE;
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if (coreCollectDebugStats) {
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double et = time_now_d();
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flushReasonTimes_[reason] += et - st;
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@ -106,8 +106,8 @@ const SoftwareCommandTableEntry softgpuCommandTable[] = {
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{ GE_CMD_FOG1, 0, SoftDirty::TRANSFORM_FOG },
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{ GE_CMD_FOG2, 0, SoftDirty::TRANSFORM_FOG },
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{ GE_CMD_CLEARMODE, 0, SoftDirty::TRANSFORM_BASIC | SoftDirty::RAST_TEX | SoftDirty::SAMPLER_BASIC | SoftDirty::SAMPLER_TEXLIST | SoftDirty::PIXEL_BASIC | SoftDirty::PIXEL_ALPHA | SoftDirty::PIXEL_STENCIL | SoftDirty::PIXEL_CACHED },
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{ GE_CMD_TEXTUREMAPENABLE, 0, SoftDirty::SAMPLER_BASIC | SoftDirty::SAMPLER_TEXLIST | SoftDirty::RAST_TEX | SoftDirty::TRANSFORM_BASIC },
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{ GE_CMD_CLEARMODE, 0, SoftDirty::TRANSFORM_BASIC | SoftDirty::RAST_TEX | SoftDirty::SAMPLER_BASIC | SoftDirty::SAMPLER_TEXLIST | SoftDirty::PIXEL_BASIC | SoftDirty::PIXEL_ALPHA | SoftDirty::PIXEL_STENCIL | SoftDirty::PIXEL_CACHED | SoftDirty::BINNER_RANGE | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXTUREMAPENABLE, 0, SoftDirty::SAMPLER_BASIC | SoftDirty::SAMPLER_TEXLIST | SoftDirty::RAST_TEX | SoftDirty::TRANSFORM_BASIC | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_FOGENABLE, 0, SoftDirty::PIXEL_BASIC | SoftDirty::PIXEL_CACHED | SoftDirty::TRANSFORM_BASIC | SoftDirty::TRANSFORM_FOG | SoftDirty::TRANSFORM_MATRIX },
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{ GE_CMD_TEXMODE, 0, SoftDirty::SAMPLER_BASIC | SoftDirty::SAMPLER_TEXLIST | SoftDirty::RAST_TEX },
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// Currently this doesn't affect any state, but maybe it should.
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@ -155,8 +155,8 @@ const SoftwareCommandTableEntry softgpuCommandTable[] = {
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{ GE_CMD_MASKRGB, 0, SoftDirty::PIXEL_BASIC | SoftDirty::PIXEL_WRITEMASK },
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{ GE_CMD_MASKALPHA, 0, SoftDirty::PIXEL_BASIC | SoftDirty::PIXEL_WRITEMASK },
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{ GE_CMD_ZTEST, 0, SoftDirty::PIXEL_BASIC },
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{ GE_CMD_ZTESTENABLE, 0, SoftDirty::PIXEL_BASIC },
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{ GE_CMD_ZWRITEDISABLE, 0, SoftDirty::PIXEL_BASIC },
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{ GE_CMD_ZTESTENABLE, 0, SoftDirty::PIXEL_BASIC | SoftDirty::BINNER_RANGE | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_ZWRITEDISABLE, 0, SoftDirty::PIXEL_BASIC | SoftDirty::BINNER_RANGE | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_LOGICOP, 0, SoftDirty::PIXEL_BASIC | SoftDirty::PIXEL_CACHED },
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{ GE_CMD_LOGICOPENABLE, 0, SoftDirty::PIXEL_BASIC | SoftDirty::PIXEL_CACHED },
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@ -168,33 +168,33 @@ const SoftwareCommandTableEntry softgpuCommandTable[] = {
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{ GE_CMD_TEXOFFSETU },
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{ GE_CMD_TEXOFFSETV },
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{ GE_CMD_TEXSIZE0, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXSIZE1, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXSIZE2, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXSIZE3, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXSIZE4, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXSIZE5, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXSIZE6, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXSIZE7, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXFORMAT, 0, SoftDirty::SAMPLER_BASIC | SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXSIZE0, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXSIZE1, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXSIZE2, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXSIZE3, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXSIZE4, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXSIZE5, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXSIZE6, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXSIZE7, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXFORMAT, 0, SoftDirty::SAMPLER_BASIC | SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXLEVEL, 0, SoftDirty::RAST_TEX },
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{ GE_CMD_TEXLODSLOPE, 0, SoftDirty::RAST_TEX },
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{ GE_CMD_TEXADDR0, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXADDR1, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXADDR2, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXADDR3, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXADDR4, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXADDR5, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXADDR6, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXADDR7, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXBUFWIDTH0, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXBUFWIDTH1, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXBUFWIDTH2, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXBUFWIDTH3, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXBUFWIDTH4, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXBUFWIDTH5, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXBUFWIDTH6, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXBUFWIDTH7, 0, SoftDirty::SAMPLER_TEXLIST },
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{ GE_CMD_TEXADDR0, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXADDR1, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXADDR2, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXADDR3, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXADDR4, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXADDR5, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXADDR6, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXADDR7, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXBUFWIDTH0, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXBUFWIDTH1, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXBUFWIDTH2, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXBUFWIDTH3, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXBUFWIDTH4, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXBUFWIDTH5, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXBUFWIDTH6, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_TEXBUFWIDTH7, 0, SoftDirty::SAMPLER_TEXLIST | SoftDirty::BINNER_OVERLAP },
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{ GE_CMD_CLUTADDR },
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{ GE_CMD_CLUTADDRUPPER },
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@ -84,6 +84,7 @@ enum class SoftDirty : uint64_t {
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TRANSFORM_FOG = 1ULL << 20,
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BINNER_RANGE = 1ULL << 21,
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BINNER_OVERLAP = 1ULL << 22,
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};
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static inline SoftDirty operator |(const SoftDirty &lhs, const SoftDirty &rhs) {
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return SoftDirty((uint64_t)lhs | (uint64_t)rhs);
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