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Implement Vsrt1,Vsrt2,Vsrt3,Vsrt4

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This commit is contained in:
raven02 2012-12-21 14:30:34 +08:00 committed by raven02
parent bf0792e42a
commit ab0253d71c
3 changed files with 100 additions and 4 deletions
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92
Core/MIPS/MIPSIntVFPU.cpp
View File

@ -883,6 +883,98 @@ namespace MIPSInt
EatPrefixes(); EatPrefixes();
} }
void Int_Vsrt1(u32 op)
{
float s[4];
float d[4];
int vd = _VD;
int vs = _VS;
VectorSize sz = GetVecSize(op);
ReadVector(s, sz, vs);
ApplySwizzleS(s, sz);
float x = s[0];
float y = s[1];
float z = s[2];
float w = s[3];
d[0] = std::min(x, y);
d[1] = std::max(x, y);
d[2] = std::min(z, w);
d[3] = std::max(z, w);
ApplyPrefixD(d, sz);
WriteVector(d, sz, vd);
PC += 4;
EatPrefixes();
}
void Int_Vsrt2(u32 op)
{
float s[4];
float d[4];
int vd = _VD;
int vs = _VS;
VectorSize sz = GetVecSize(op);
ReadVector(s, sz, vs);
ApplySwizzleS(s, sz);
float x = s[0];
float y = s[1];
float z = s[2];
float w = s[3];
d[0] = std::min(x, w);
d[1] = std::min(y, z);
d[2] = std::max(y, z);
d[3] = std::max(x, w);
ApplyPrefixD(d, sz);
WriteVector(d, sz, vd);
PC += 4;
EatPrefixes();
}
void Int_Vsrt3(u32 op)
{
float s[4];
float d[4];
int vd = _VD;
int vs = _VS;
VectorSize sz = GetVecSize(op);
ReadVector(s, sz, vs);
ApplySwizzleS(s, sz);
float x = s[0];
float y = s[1];
float z = s[2];
float w = s[3];
d[0] = std::max(x, y);
d[1] = std::min(x, y);
d[2] = std::max(z, w);
d[3] = std::min(z, w);
ApplyPrefixD(d, sz);
WriteVector(d, sz, vd);
PC += 4;
EatPrefixes();
}
void Int_Vsrt4(u32 op)
{
float s[4];
float d[4];
int vd = _VD;
int vs = _VS;
VectorSize sz = GetVecSize(op);
ReadVector(s, sz, vs);
ApplySwizzleS(s, sz);
float x = s[0];
float y = s[1];
float z = s[2];
float w = s[3];
d[0] = std::max(x, w);
d[1] = std::max(y, z);
d[2] = std::min(y, z);
d[3] = std::min(x, w);
ApplyPrefixD(d, sz);
WriteVector(d, sz, vd);
PC += 4;
EatPrefixes();
}
void Int_Vcrs(u32 op) void Int_Vcrs(u32 op)
{ {
//half a cross product //half a cross product

4
Core/MIPS/MIPSIntVFPU.h
View File

@ -55,6 +55,10 @@ namespace MIPSInt
void Int_VPFX(u32 op); void Int_VPFX(u32 op);
void Int_Vflush(u32 op); void Int_Vflush(u32 op);
void Int_Vbfy(u32 op); void Int_Vbfy(u32 op);
void Int_Vsrt1(u32 op);
void Int_Vsrt2(u32 op);
void Int_Vsrt3(u32 op);
void Int_Vsrt4(u32 op);
void Int_Vf2i(u32 op); void Int_Vf2i(u32 op);
void Int_Vi2f(u32 op); void Int_Vi2f(u32 op);
void Int_Vi2x(u32 op); void Int_Vi2x(u32 op);

8
Core/MIPS/MIPSTables.cpp
View File

@ -685,8 +685,8 @@ MIPSInstruction tableVFPUMatrixSet1[16] = //111100 11100 0xxxx (rm x is 16)
MIPSInstruction tableVFPU9[32] = //110100 00010 xxxxx MIPSInstruction tableVFPU9[32] = //110100 00010 xxxxx
{ {
INSTR("vsrt1", &Jit::Comp_Generic, Dis_Generic, 0, IS_VFPU), INSTR("vsrt1", &Jit::Comp_Generic, Dis_Vbfy, Int_Vsrt1, IS_VFPU),
INSTR("vsrt2", &Jit::Comp_Generic, Dis_Generic, 0, IS_VFPU), INSTR("vsrt2", &Jit::Comp_Generic, Dis_Vbfy, Int_Vsrt2, IS_VFPU),
INSTR("vbfy1", &Jit::Comp_Generic, Dis_Vbfy, Int_Vbfy, IS_VFPU), INSTR("vbfy1", &Jit::Comp_Generic, Dis_Vbfy, Int_Vbfy, IS_VFPU),
INSTR("vbfy2", &Jit::Comp_Generic, Dis_Vbfy, Int_Vbfy, IS_VFPU), INSTR("vbfy2", &Jit::Comp_Generic, Dis_Vbfy, Int_Vbfy, IS_VFPU),
//4 //4
@ -695,8 +695,8 @@ MIPSInstruction tableVFPU9[32] = //110100 00010 xxxxx
INSTR("vfad", &Jit::Comp_Generic, Dis_Vfad, Int_Vfad, IS_VFPU), INSTR("vfad", &Jit::Comp_Generic, Dis_Vfad, Int_Vfad, IS_VFPU),
INSTR("vavg", &Jit::Comp_Generic, Dis_Vfad, Int_Vavg, IS_VFPU), INSTR("vavg", &Jit::Comp_Generic, Dis_Vfad, Int_Vavg, IS_VFPU),
//8 //8
INSTR("vsrt3", &Jit::Comp_Generic, Dis_Generic, 0, IS_VFPU), INSTR("vsrt3", &Jit::Comp_Generic, Dis_Vbfy, Int_Vsrt3, IS_VFPU),
INSTR("vsrt4", &Jit::Comp_Generic, Dis_Generic, 0, IS_VFPU), INSTR("vsrt4", &Jit::Comp_Generic, Dis_Vbfy, Int_Vsrt4, IS_VFPU),
INSTR("vsgn", &Jit::Comp_Generic, Dis_Vbfy, Int_Vsgn, IS_VFPU), INSTR("vsgn", &Jit::Comp_Generic, Dis_Vbfy, Int_Vsgn, IS_VFPU),
{-2}, {-2},
//12 //12