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riscv: Fix signed position bug in vertexjit.

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Unknown W. Brackets 2023-07-23 17:55:07 -07:00
parent 5cbad1982b
commit b041e712de
1 changed files with 2 additions and 2 deletions
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4
GPU/Common/VertexDecoderRiscV.cpp
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@ -867,8 +867,8 @@ void VertexDecoderJitCache::Jit_PosS16Through() {
LH(tempReg2, srcReg, dec_->posoff + 2);
// This one, Z, has to be unsigned.
LHU(tempReg3, srcReg, dec_->posoff + 4);
FCVT(FConv::S, FConv::WU, fpSrc[0], tempReg1, Round::TOZERO);
FCVT(FConv::S, FConv::WU, fpSrc[1], tempReg2, Round::TOZERO);
FCVT(FConv::S, FConv::W, fpSrc[0], tempReg1, Round::TOZERO);
FCVT(FConv::S, FConv::W, fpSrc[1], tempReg2, Round::TOZERO);
FCVT(FConv::S, FConv::WU, fpSrc[2], tempReg3, Round::TOZERO);
FS(32, fpSrc[0], dstReg, dec_->decFmt.posoff + 0);
FS(32, fpSrc[1], dstReg, dec_->decFmt.posoff + 4);