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Switch another enum to enum class

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This commit is contained in:
Henrik Rydgard 2017-03-02 12:36:54 +01:00
parent 700e533622
commit b9b3a022fb
9 changed files with 35 additions and 31 deletions
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14
Core/Config.cpp
View File

@ -281,11 +281,11 @@ static int DefaultNumWorkers() {
// TODO: Default to IRJit on iOS when it's done.
static int DefaultCpuCore() {
#ifdef IOS
return iosCanUseJit ? CPU_CORE_JIT : CPU_CORE_INTERPRETER;
return iosCanUseJit ? CPUCore::JIT : CPUCore::INTERPRETER;
#elif defined(ARM) || defined(ARM64) || defined(_M_IX86) || defined(_M_X64)
return CPU_CORE_JIT;
return (int)CPUCore::JIT;
#else
return CPU_CORE_INTERPRETER;
return CPUCore::INTERPRETER;
#endif
}
@ -966,16 +966,16 @@ void Config::Load(const char *iniFileName, const char *controllerIniFilename) {
}
// Override ppsspp.ini JIT value to prevent crashing
if (DefaultCpuCore() != CPU_CORE_JIT && g_Config.iCpuCore == CPU_CORE_JIT) {
if (DefaultCpuCore() != (int)CPUCore::JIT && g_Config.iCpuCore == (int)CPUCore::JIT) {
jitForcedOff = true;
g_Config.iCpuCore = CPU_CORE_INTERPRETER;
g_Config.iCpuCore = (int)CPUCore::INTERPRETER;
}
}
void Config::Save() {
if (jitForcedOff) {
// if JIT has been forced off, we don't want to screw up the user's ppsspp.ini
g_Config.iCpuCore = CPU_CORE_JIT;
g_Config.iCpuCore = (int)CPUCore::JIT;
}
if (iniFilename_.size() && g_Config.bSaveSettings) {
@ -1044,7 +1044,7 @@ void Config::Save() {
}
if (jitForcedOff) {
// force JIT off again just in case Config::Save() is called without exiting PPSSPP
g_Config.iCpuCore = CPU_CORE_INTERPRETER;
g_Config.iCpuCore = (int)CPUCore::INTERPRETER;
}
}

8
Core/Config.h
View File

@ -31,10 +31,10 @@ const int PSP_DEFAULT_FIRMWARE = 150;
static const s8 VOLUME_OFF = 0;
static const s8 VOLUME_MAX = 10;
enum CPUCore {
CPU_CORE_INTERPRETER = 0,
CPU_CORE_JIT = 1,
CPU_CORE_IRJIT = 2,
enum class CPUCore {
INTERPRETER = 0,
JIT = 1,
IR_JIT = 2,
};
enum {

2
Core/CoreParameter.h
View File

@ -38,6 +38,8 @@ namespace Draw {
class DrawContext;
}
enum class CPUCore;
// PSP_CoreParameter()
struct CoreParameter {
CoreParameter() : thin3d(nullptr), collectEmuLog(0), unthrottle(false), fpsLimit(0), updateRecent(true), freezeNext(false), frozen(false), mountIsoLoader(nullptr) {}

16
Core/MIPS/MIPS.cpp
View File

@ -207,9 +207,9 @@ void MIPSState::Init() {
// Initialize the VFPU random number generator with .. something?
rng.Init(0x1337);
if (PSP_CoreParameter().cpuCore == CPU_CORE_JIT) {
if (PSP_CoreParameter().cpuCore == CPUCore::JIT) {
MIPSComp::jit = MIPSComp::CreateNativeJit(this);
} else if (PSP_CoreParameter().cpuCore == CPU_CORE_IRJIT) {
} else if (PSP_CoreParameter().cpuCore == CPUCore::IR_JIT) {
MIPSComp::jit = new MIPSComp::IRJit(this);
} else {
MIPSComp::jit = nullptr;
@ -227,7 +227,7 @@ void MIPSState::UpdateCore(CPUCore desired) {
PSP_CoreParameter().cpuCore = desired;
switch (PSP_CoreParameter().cpuCore) {
case CPU_CORE_JIT:
case CPUCore::JIT:
INFO_LOG(CPU, "Switching to JIT");
if (MIPSComp::jit) {
delete MIPSComp::jit;
@ -235,7 +235,7 @@ void MIPSState::UpdateCore(CPUCore desired) {
MIPSComp::jit = MIPSComp::CreateNativeJit(this);
break;
case CPU_CORE_IRJIT:
case CPUCore::IR_JIT:
INFO_LOG(CPU, "Switching to IRJIT");
if (MIPSComp::jit) {
delete MIPSComp::jit;
@ -243,7 +243,7 @@ void MIPSState::UpdateCore(CPUCore desired) {
MIPSComp::jit = new MIPSComp::IRJit(this);
break;
case CPU_CORE_INTERPRETER:
case CPUCore::INTERPRETER:
INFO_LOG(CPU, "Switching to interpreter");
delete MIPSComp::jit;
MIPSComp::jit = 0;
@ -304,12 +304,12 @@ void MIPSState::SingleStep() {
// returns 1 if reached ticks limit
int MIPSState::RunLoopUntil(u64 globalTicks) {
switch (PSP_CoreParameter().cpuCore) {
case CPU_CORE_JIT:
case CPU_CORE_IRJIT:
case CPUCore::JIT:
case CPUCore::IR_JIT:
MIPSComp::jit->RunLoopUntil(globalTicks);
break;
case CPU_CORE_INTERPRETER:
case CPUCore::INTERPRETER:
return MIPSInterpret_RunUntil(globalTicks);
}
return 1;

4
Core/MIPS/MIPS.h
View File

@ -19,7 +19,7 @@
#include "util/random/rng.h"
#include "Common/CommonTypes.h"
#include "Core/CoreParameter.h"
// #include "Core/CoreParameter.h"
#include "Core/Opcode.h"
class PointerWrap;
@ -143,6 +143,8 @@ enum VCondition
extern u8 voffset[128];
extern u8 fromvoffset[128];
enum class CPUCore;
class MIPSState
{
public:

4
Core/MemMapFunctions.cpp
View File

@ -87,7 +87,7 @@ inline void ReadFromHardware(T &var, const u32 address) {
var = *((const T*)GetPointerUnchecked(address));
} else {
// In jit, we only flush PC when bIgnoreBadMemAccess is off.
if (g_Config.iCpuCore == CPU_CORE_JIT && g_Config.bIgnoreBadMemAccess) {
if (g_Config.iCpuCore == (int)CPUCore::JIT && g_Config.bIgnoreBadMemAccess) {
WARN_LOG(MEMMAP, "ReadFromHardware: Invalid address %08x", address);
} else {
WARN_LOG(MEMMAP, "ReadFromHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
@ -123,7 +123,7 @@ inline void WriteToHardware(u32 address, const T data) {
*(T*)GetPointerUnchecked(address) = data;
} else {
// In jit, we only flush PC when bIgnoreBadMemAccess is off.
if (g_Config.iCpuCore == CPU_CORE_JIT && g_Config.bIgnoreBadMemAccess) {
if (g_Config.iCpuCore == (int)CPUCore::JIT && g_Config.bIgnoreBadMemAccess) {
WARN_LOG(MEMMAP, "WriteToHardware: Invalid address %08x", address);
} else {
WARN_LOG(MEMMAP, "WriteToHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);

6
UI/NativeApp.cpp
View File

@ -397,15 +397,15 @@ void NativeInit(int argc, const char *argv[], const char *savegame_dir, const ch
logLevel = LogTypes::LVERBOSE;
break;
case 'j':
g_Config.iCpuCore = CPU_CORE_JIT;
g_Config.iCpuCore = (int)CPUCore::JIT;
g_Config.bSaveSettings = false;
break;
case 'i':
g_Config.iCpuCore = CPU_CORE_INTERPRETER;
g_Config.iCpuCore = (int)CPUCore::INTERPRETER;
g_Config.bSaveSettings = false;
break;
case 'r':
g_Config.iCpuCore = CPU_CORE_IRJIT;
g_Config.iCpuCore = (int)CPUCore::IR_JIT;
g_Config.bSaveSettings = false;
break;
case '-':

8
headless/Headless.cpp
View File

@ -205,7 +205,7 @@ int main(int argc, const char* argv[])
bool verbose = false;
const char *stateToLoad = 0;
GPUCore gpuCore = GPUCORE_NULL;
CPUCore cpuCore = CPU_CORE_JIT;
CPUCore cpuCore = CPUCore::JIT;
std::vector<std::string> testFilenames;
const char *mountIso = 0;
@ -230,11 +230,11 @@ int main(int argc, const char* argv[])
else if (!strcmp(argv[i], "-l") || !strcmp(argv[i], "--log"))
fullLog = true;
else if (!strcmp(argv[i], "-i"))
cpuCore = CPU_CORE_INTERPRETER;
cpuCore = CPUCore::INTERPRETER;
else if (!strcmp(argv[i], "-j"))
cpuCore = CPU_CORE_JIT;
cpuCore = CPUCore::JIT;
else if (!strcmp(argv[i], "--ir"))
cpuCore = CPU_CORE_IRJIT;
cpuCore = CPUCore::IR_JIT;
else if (!strcmp(argv[i], "-c") || !strcmp(argv[i], "--compare"))
autoCompare = true;
else if (!strcmp(argv[i], "-v") || !strcmp(argv[i], "--verbose"))

4
unittest/JitHarness.cpp
View File

@ -81,7 +81,7 @@ static void SetupJitHarness() {
coreState = CORE_POWERUP;
currentMIPS = &mipsr4k;
Memory::g_MemorySize = Memory::RAM_NORMAL_SIZE;
PSP_CoreParameter().cpuCore = CPU_CORE_INTERPRETER;
PSP_CoreParameter().cpuCore = CPUCore::INTERPRETER;
PSP_CoreParameter().unthrottle = true;
Memory::Init();
@ -167,7 +167,7 @@ bool TestJit() {
double jit_speed = 0.0, interp_speed = 0.0;
if (compileSuccess) {
interp_speed = ExecCPUTest();
mipsr4k.UpdateCore(CPU_CORE_JIT);
mipsr4k.UpdateCore(CPUCore::JIT);
jit_speed = ExecCPUTest();
// Disassemble