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Merge pull request #4468 from hrydgard/vtxdec-prescale
Add support for prescaled UV in vertex decoder JIT
This commit is contained in:
Henrik Rydgård
commit
c213c44050
@ -787,6 +787,9 @@ struct JitLookup {
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JitStepFunction jitFunc;
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};
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static const float by128 = 1.0f / 128.0f;
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static const float by32768 = 1.0f / 32768.0f;
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#ifdef ARM
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using namespace ArmGen;
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@ -798,6 +801,12 @@ static const ARMReg scratchReg = R6;
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static const ARMReg srcReg = R0;
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static const ARMReg dstReg = R1;
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static const ARMReg counterReg = R2;
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static const ARMReg fpScratchReg = S4;
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static const ARMReg fpScratchReg2 = S5;
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static const ARMReg fpUscaleReg = S0;
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static const ARMReg fpVscaleReg = S1;
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static const ARMReg fpUoffsetReg = S2;
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static const ARMReg fpVoffsetReg = S3;
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static const JitLookup jitLookup[] = {
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{&VertexDecoder::Step_WeightsU8, &VertexDecoderJitCache::Jit_WeightsU8},
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@ -808,6 +817,10 @@ static const JitLookup jitLookup[] = {
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{&VertexDecoder::Step_TcU16, &VertexDecoderJitCache::Jit_TcU16},
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{&VertexDecoder::Step_TcFloat, &VertexDecoderJitCache::Jit_TcFloat},
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{&VertexDecoder::Step_TcU8Prescale, &VertexDecoderJitCache::Jit_TcU8Prescale},
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{&VertexDecoder::Step_TcU16Prescale, &VertexDecoderJitCache::Jit_TcU16Prescale},
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{&VertexDecoder::Step_TcFloatPrescale, &VertexDecoderJitCache::Jit_TcFloatPrescale},
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{&VertexDecoder::Step_TcU16Through, &VertexDecoderJitCache::Jit_TcU16Through},
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{&VertexDecoder::Step_TcFloatThrough, &VertexDecoderJitCache::Jit_TcFloatThrough},
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@ -830,19 +843,40 @@ static const JitLookup jitLookup[] = {
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};
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JittedVertexDecoder VertexDecoderJitCache::Compile(const VertexDecoder &dec) {
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// return 0;
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dec_ = &dec;
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const u8 *start = this->GetCodePtr();
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// TODO: Test and make work
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bool prescaleStep = false;
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// Look for prescaled texcoord steps
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for (int i = 0; i < dec.numSteps_; i++) {
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if (dec.steps_[i] == &VertexDecoder::Step_TcU8Prescale ||
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dec.steps_[i] == &VertexDecoder::Step_TcU16Prescale ||
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dec.steps_[i] == &VertexDecoder::Step_TcFloatPrescale) {
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prescaleStep = true;
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}
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}
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SetCC(CC_AL);
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PUSH(6, R4, R5, R6, R7, R8, _LR);
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// Preserving our FP scratch register appears to improve stability.
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VMOV(R7, S0);
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// Keep the scale/offset in a few fp registers if we need it.
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if (prescaleStep) {
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MOVI2R(R3, (u32)(&gstate_c.uv), scratchReg);
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VLDR(fpUscaleReg, R3, 0);
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VLDR(fpVscaleReg, R3, 4);
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VLDR(fpUoffsetReg, R3, 8);
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VLDR(fpVoffsetReg, R3, 12);
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if ((dec.VertexType() & GE_VTYPE_TC_MASK) == GE_VTYPE_TC_8BIT) {
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MOVI2F(fpScratchReg, by128, scratchReg);
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VMUL(fpUscaleReg, fpUscaleReg, fpScratchReg);
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VMUL(fpVscaleReg, fpVscaleReg, fpScratchReg);
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} else if ((dec.VertexType() & GE_VTYPE_TC_MASK) == GE_VTYPE_TC_16BIT) {
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MOVI2F(fpScratchReg, by32768, scratchReg);
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VMUL(fpUscaleReg, fpUscaleReg, fpScratchReg);
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VMUL(fpVscaleReg, fpVscaleReg, fpScratchReg);
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}
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}
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JumpTarget loopStart = GetCodePtr();
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for (int i = 0; i < dec.numSteps_; i++) {
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@ -861,17 +895,14 @@ JittedVertexDecoder VertexDecoderJitCache::Compile(const VertexDecoder &dec) {
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SUBS(counterReg, counterReg, 1);
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B_CC(CC_NEQ, loopStart);
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VMOV(S0, R7); // restore our fp scratch
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EOR(R0, R0, R0);
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POP(6, R4, R5, R6, R7, R8, _PC);
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FlushIcache();
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// DisassembleArm(start, GetCodePtr() - start);
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// char temp[1024] = {0};
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// dec.ToString(temp);
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// INFO_LOG(HLE, "%s", temp);
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DisassembleArm(start, GetCodePtr() - start);
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char temp[1024] = {0};
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dec.ToString(temp);
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INFO_LOG(HLE, "%s", temp);
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return (JittedVertexDecoder)start;
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}
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@ -962,6 +993,51 @@ void VertexDecoderJitCache::Jit_TcFloatThrough() {
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STR(tempReg2, dstReg, dec_->decFmt.uvoff + 4);
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}
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void VertexDecoderJitCache::Jit_TcU8Prescale() {
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// TODO: SIMD
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LDRB(tempReg1, srcReg, dec_->tcoff);
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LDRB(tempReg2, srcReg, dec_->tcoff + 1);
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VMOV(fpScratchReg, tempReg1);
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VMOV(fpScratchReg2, tempReg2);
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VCVT(fpScratchReg, fpScratchReg, TO_FLOAT);
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VCVT(fpScratchReg2, fpScratchReg2, TO_FLOAT);
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// Could replace VMUL + VADD with VMLA but would require 2 more regs as we don't want to destroy fp*offsetReg. Later.
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VMUL(fpScratchReg, fpScratchReg, fpUscaleReg);
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VMUL(fpScratchReg2, fpScratchReg2, fpVscaleReg);
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VADD(fpScratchReg, fpScratchReg, fpUoffsetReg);
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VADD(fpScratchReg2, fpScratchReg2, fpVoffsetReg);
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VSTR(fpScratchReg, dstReg, dec_->decFmt.uvoff);
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VSTR(fpScratchReg2, dstReg, dec_->decFmt.uvoff + 4);
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}
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void VertexDecoderJitCache::Jit_TcU16Prescale() {
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// TODO: SIMD
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LDRH(tempReg1, srcReg, dec_->tcoff);
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LDRH(tempReg2, srcReg, dec_->tcoff + 2);
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VMOV(fpScratchReg, tempReg1);
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VMOV(fpScratchReg2, tempReg2);
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VCVT(fpScratchReg, fpScratchReg, TO_FLOAT);
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VCVT(fpScratchReg2, fpScratchReg2, TO_FLOAT);
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VMUL(fpScratchReg, fpScratchReg, fpUscaleReg);
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VMUL(fpScratchReg2, fpScratchReg2, fpVscaleReg);
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VADD(fpScratchReg, fpScratchReg, fpUoffsetReg);
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VADD(fpScratchReg2, fpScratchReg2, fpVoffsetReg);
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VSTR(fpScratchReg, dstReg, dec_->decFmt.uvoff);
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VSTR(fpScratchReg2, dstReg, dec_->decFmt.uvoff + 4);
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}
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void VertexDecoderJitCache::Jit_TcFloatPrescale() {
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// TODO: SIMD
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VLDR(fpScratchReg, srcReg, dec_->tcoff);
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VLDR(fpScratchReg2, srcReg, dec_->tcoff + 4);
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VMUL(fpScratchReg, fpScratchReg, fpUscaleReg);
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VMUL(fpScratchReg2, fpScratchReg2, fpVscaleReg);
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VADD(fpScratchReg, fpScratchReg, fpUoffsetReg);
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VADD(fpScratchReg2, fpScratchReg2, fpVoffsetReg);
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VSTR(fpScratchReg, dstReg, dec_->decFmt.uvoff);
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VSTR(fpScratchReg2, dstReg, dec_->decFmt.uvoff + 4);
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}
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void VertexDecoderJitCache::Jit_Color8888() {
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LDR(tempReg1, srcReg, dec_->coloff);
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STR(tempReg1, dstReg, dec_->decFmt.c0off);
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@ -1080,23 +1156,23 @@ void VertexDecoderJitCache::Jit_PosS8Through() {
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LDRSB(tempReg3, srcReg, dec_->posoff + 2);
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static const ARMReg tr[3] = { tempReg1, tempReg2, tempReg3 };
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for (int i = 0; i < 3; i++) {
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VMOV(S0, tr[i]);
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VCVT(S0, S0, TO_FLOAT | IS_SIGNED);
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VSTR(S0, dstReg, dec_->decFmt.posoff + i * 4);
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VMOV(fpScratchReg, tr[i]);
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VCVT(fpScratchReg, fpScratchReg, TO_FLOAT | IS_SIGNED);
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VSTR(fpScratchReg, dstReg, dec_->decFmt.posoff + i * 4);
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}
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}
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// Through expands into floats, always. Might want to look at changing this.
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void VertexDecoderJitCache::Jit_PosS16Through() {
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// TODO: SIMD
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LDRSH(tempReg1, srcReg, dec_->posoff);
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LDRSH(tempReg2, srcReg, dec_->posoff + 2);
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LDRSH(tempReg3, srcReg, dec_->posoff + 4);
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static const ARMReg tr[3] = { tempReg1, tempReg2, tempReg3 };
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// TODO: SIMD
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for (int i = 0; i < 3; i++) {
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VMOV(S0, tr[i]);
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VCVT(S0, S0, TO_FLOAT | IS_SIGNED);
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VSTR(S0, dstReg, dec_->decFmt.posoff + i * 4);
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VMOV(fpScratchReg, tr[i]);
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VCVT(fpScratchReg, fpScratchReg, TO_FLOAT | IS_SIGNED);
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VSTR(fpScratchReg, dstReg, dec_->decFmt.posoff + i * 4);
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}
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}
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@ -1160,6 +1236,14 @@ static const X64Reg dstReg = EDI;
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static const X64Reg counterReg = ECX;
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#endif
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// XMM0-XMM5 are volatile on Windows X64
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// XMM0-XMM7 are arguments (and thus volatile) on System V ABI (other x64 platforms)
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static const X64Reg fpUscaleReg = XMM0;
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static const X64Reg fpVscaleReg = XMM1;
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static const X64Reg fpUoffsetReg = XMM2;
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static const X64Reg fpVoffsetReg = XMM3;
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static const X64Reg fpScratchReg = XMM4;
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static const X64Reg fpScratchReg2 = XMM5;
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// To debug, just comment them out one at a time until it works. We fall back
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// on the interpreter if the compiler fails.
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@ -1173,6 +1257,10 @@ static const JitLookup jitLookup[] = {
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{&VertexDecoder::Step_TcU16, &VertexDecoderJitCache::Jit_TcU16},
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{&VertexDecoder::Step_TcFloat, &VertexDecoderJitCache::Jit_TcFloat},
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{&VertexDecoder::Step_TcU8Prescale, &VertexDecoderJitCache::Jit_TcU8Prescale},
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{&VertexDecoder::Step_TcU16Prescale, &VertexDecoderJitCache::Jit_TcU16Prescale},
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{&VertexDecoder::Step_TcFloatPrescale, &VertexDecoderJitCache::Jit_TcFloatPrescale},
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{&VertexDecoder::Step_TcU16Through, &VertexDecoderJitCache::Jit_TcU16Through},
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{&VertexDecoder::Step_TcFloatThrough, &VertexDecoderJitCache::Jit_TcFloatThrough},
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@ -1194,6 +1282,13 @@ static const JitLookup jitLookup[] = {
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{&VertexDecoder::Step_PosFloat, &VertexDecoderJitCache::Jit_PosFloat},
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};
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// TODO: This should probably be global...
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#ifdef _M_X64
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#define PTRBITS 64
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#else
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#define PTRBITS 32
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#endif
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JittedVertexDecoder VertexDecoderJitCache::Compile(const VertexDecoder &dec) {
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dec_ = &dec;
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const u8 *start = this->GetCodePtr();
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@ -1211,6 +1306,44 @@ JittedVertexDecoder VertexDecoderJitCache::Compile(const VertexDecoder &dec) {
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MOV(32, R(dstReg), MDisp(ESP, 16 + offset + 4));
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MOV(32, R(counterReg), MDisp(ESP, 16 + offset + 8));
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#endif
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// Save XMM4/XMM5 which apparently can be problematic?
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// Actually, if they are, it must be a compiler bug because they SHOULD be ok.
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// So I won't bother.
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// SUB(PTRBITS, R(ESP), Imm8(32));
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// MOVUPS(MDisp(ESP, 0), XMM4);
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// MOVUPS(MDisp(ESP, 16), XMM5);
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bool prescaleStep = false;
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// Look for prescaled texcoord steps
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for (int i = 0; i < dec.numSteps_; i++) {
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if (dec.steps_[i] == &VertexDecoder::Step_TcU8Prescale ||
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dec.steps_[i] == &VertexDecoder::Step_TcU16Prescale ||
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dec.steps_[i] == &VertexDecoder::Step_TcFloatPrescale) {
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prescaleStep = true;
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}
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}
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// Keep the scale/offset in a few fp registers if we need it.
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if (prescaleStep) {
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#ifdef _M_X64
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MOV(64, R(tempReg1), Imm64((u64)(&gstate_c.uv)));
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#else
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MOV(32, R(tempReg1), Imm32((u32)(&gstate_c.uv)));
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#endif
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MOVSS(fpUscaleReg, MDisp(tempReg1, 0));
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MOVSS(fpVscaleReg, MDisp(tempReg1, 4));
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MOVSS(fpUoffsetReg, MDisp(tempReg1, 8));
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MOVSS(fpVoffsetReg, MDisp(tempReg1, 12));
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if ((dec.VertexType() & GE_VTYPE_TC_MASK) == GE_VTYPE_TC_8BIT) {
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MULSS(fpUscaleReg, M((void *)&by128));
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MULSS(fpVscaleReg, M((void *)&by128));
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} else if ((dec.VertexType() & GE_VTYPE_TC_MASK) == GE_VTYPE_TC_16BIT) {
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MULSS(fpUscaleReg, M((void *)&by32768));
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MULSS(fpVscaleReg, M((void *)&by32768));
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}
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}
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// Let's not bother with a proper stack frame. We just grab the arguments and go.
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JumpTarget loopStart = GetCodePtr();
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for (int i = 0; i < dec.numSteps_; i++) {
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@ -1221,16 +1354,15 @@ JittedVertexDecoder VertexDecoderJitCache::Compile(const VertexDecoder &dec) {
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}
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}
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#ifdef _M_X64
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ADD(64, R(srcReg), Imm32(dec.VertexSize()));
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ADD(64, R(dstReg), Imm32(dec.decFmt.stride));
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#else
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ADD(32, R(srcReg), Imm32(dec.VertexSize()));
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ADD(32, R(dstReg), Imm32(dec.decFmt.stride));
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#endif
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ADD(PTRBITS, R(srcReg), Imm32(dec.VertexSize()));
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ADD(PTRBITS, R(dstReg), Imm32(dec.decFmt.stride));
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SUB(32, R(counterReg), Imm8(1));
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J_CC(CC_NZ, loopStart, true);
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// MOVUPS(XMM4, MDisp(ESP, 0));
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// MOVUPS(XMM5, MDisp(ESP, 16));
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// ADD(PTRBITS, R(ESP), Imm8(32));
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#ifdef _M_IX86
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// Restore register values
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POP(EBP);
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@ -1305,6 +1437,46 @@ void VertexDecoderJitCache::Jit_TcFloat() {
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#endif
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}
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void VertexDecoderJitCache::Jit_TcU8Prescale() {
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// TODO: SIMD
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MOVZX(32, 8, tempReg1, MDisp(srcReg, dec_->tcoff));
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MOVZX(32, 8, tempReg2, MDisp(srcReg, dec_->tcoff + 1));
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CVTSI2SS(fpScratchReg, R(tempReg1));
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CVTSI2SS(fpScratchReg2, R(tempReg2));
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MULSS(fpScratchReg, R(fpUscaleReg));
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MULSS(fpScratchReg2, R(fpVscaleReg));
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ADDSS(fpScratchReg, R(fpUoffsetReg));
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ADDSS(fpScratchReg2, R(fpVoffsetReg));
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MOVSS(MDisp(dstReg, dec_->decFmt.uvoff), fpScratchReg);
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MOVSS(MDisp(dstReg, dec_->decFmt.uvoff + 4), fpScratchReg2);
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}
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void VertexDecoderJitCache::Jit_TcU16Prescale() {
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// TODO: SIMD
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MOVZX(32, 16, tempReg1, MDisp(srcReg, dec_->tcoff));
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MOVZX(32, 16, tempReg2, MDisp(srcReg, dec_->tcoff + 2));
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CVTSI2SS(fpScratchReg, R(tempReg1));
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CVTSI2SS(fpScratchReg2, R(tempReg2));
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MULSS(fpScratchReg, R(fpUscaleReg));
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MULSS(fpScratchReg2, R(fpVscaleReg));
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ADDSS(fpScratchReg, R(fpUoffsetReg));
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ADDSS(fpScratchReg2, R(fpVoffsetReg));
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MOVSS(MDisp(dstReg, dec_->decFmt.uvoff), fpScratchReg);
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MOVSS(MDisp(dstReg, dec_->decFmt.uvoff + 4), fpScratchReg2);
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}
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void VertexDecoderJitCache::Jit_TcFloatPrescale() {
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// TODO: SIMD
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MOVSS(fpScratchReg, MDisp(srcReg, dec_->tcoff));
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MOVSS(fpScratchReg2, MDisp(srcReg, dec_->tcoff + 4));
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MULSS(fpScratchReg, R(fpUscaleReg));
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MULSS(fpScratchReg2, R(fpVscaleReg));
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ADDSS(fpScratchReg, R(fpUoffsetReg));
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ADDSS(fpScratchReg2, R(fpVoffsetReg));
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MOVSS(MDisp(dstReg, dec_->decFmt.uvoff), fpScratchReg);
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MOVSS(MDisp(dstReg, dec_->decFmt.uvoff + 4), fpScratchReg2);
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}
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void VertexDecoderJitCache::Jit_TcU16Through() {
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MOV(32, R(tempReg1), MDisp(srcReg, dec_->tcoff));
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MOV(32, MDisp(dstReg, dec_->decFmt.uvoff), R(tempReg1));
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@ -1464,8 +1636,8 @@ void VertexDecoderJitCache::Jit_PosS8Through() {
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// TODO: SIMD
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for (int i = 0; i < 3; i++) {
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MOVSX(32, 8, tempReg1, MDisp(srcReg, dec_->posoff + i));
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CVTSI2SS(XMM0, R(tempReg1));
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MOVSS(MDisp(dstReg, dec_->decFmt.posoff + i * 4), XMM0);
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CVTSI2SS(fpScratchReg, R(tempReg1));
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MOVSS(MDisp(dstReg, dec_->decFmt.posoff + i * 4), fpScratchReg);
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}
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}
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@ -1474,8 +1646,8 @@ void VertexDecoderJitCache::Jit_PosS16Through() {
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// TODO: SIMD
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for (int i = 0; i < 3; i++) {
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MOVSX(32, 16, tempReg1, MDisp(srcReg, dec_->posoff + i * 2));
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CVTSI2SS(XMM0, R(tempReg1));
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MOVSS(MDisp(dstReg, dec_->decFmt.posoff + i * 4), XMM0);
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CVTSI2SS(fpScratchReg, R(tempReg1));
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MOVSS(MDisp(dstReg, dec_->decFmt.posoff + i * 4), fpScratchReg);
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}
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}
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@ -57,6 +57,7 @@ public:
|
||||
void DecodeVerts(u8 *decoded, const void *verts, int indexLowerBound, int indexUpperBound) const;
|
||||
|
||||
bool hasColor() const { return col != 0; }
|
||||
bool hasTexcoord() const { return tc != 0; }
|
||||
int VertexSize() const { return size; } // PSP format size
|
||||
|
||||
void Step_WeightsU8() const;
|
||||
@ -190,6 +191,10 @@ public:
|
||||
void Jit_TcU16();
|
||||
void Jit_TcFloat();
|
||||
|
||||
void Jit_TcU8Prescale();
|
||||
void Jit_TcU16Prescale();
|
||||
void Jit_TcFloatPrescale();
|
||||
|
||||
void Jit_TcU16Through();
|
||||
void Jit_TcFloatThrough();
|
||||
|
||||
@ -211,4 +216,4 @@ public:
|
||||
private:
|
||||
bool CompileStep(const VertexDecoder &dec, int i);
|
||||
const VertexDecoder *dec_;
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user