diff --git a/Common/CPUDetect.h b/Common/CPUDetect.h index c50b546387..5f639df86b 100644 --- a/Common/CPUDetect.h +++ b/Common/CPUDetect.h @@ -107,6 +107,7 @@ struct CPUInfo { bool RiscV_C; bool RiscV_V; bool RiscV_B; + bool RiscV_Zicsr; // Quirks struct { diff --git a/Common/RiscVCPUDetect.cpp b/Common/RiscVCPUDetect.cpp index 3ed013d2d5..dfcaf74618 100644 --- a/Common/RiscVCPUDetect.cpp +++ b/Common/RiscVCPUDetect.cpp @@ -18,6 +18,12 @@ #include "ppsspp_config.h" #if PPSSPP_ARCH(RISCV64) +#include "ext/cpu_features/include/cpuinfo_riscv.h" + +#if defined(CPU_FEATURES_OS_LINUX) +#define USE_CPU_FEATURES 1 +#endif + #include #include #include @@ -174,6 +180,21 @@ void CPUInfo::Detect() RiscV_C = ExtensionSupported(hwcap, 'C'); RiscV_V = ExtensionSupported(hwcap, 'V'); RiscV_B = ExtensionSupported(hwcap, 'B'); + // Let's assume for now... + RiscV_Zicsr = RiscV_M && RiscV_A && RiscV_F && RiscV_D; + +#ifdef USE_CPU_FEATURES + cpu_features::RiscvInfo info = cpu_features::GetRiscvInfo(); + CPU64bit = info.features.RV64I; + RiscV_M = info.features.M; + RiscV_A = info.features.A; + RiscV_F = info.features.F; + RiscV_D = info.features.D; + RiscV_C = info.features.C; + RiscV_Zicsr = info.features.Zicsr; + + truncate_cpy(brand_string, info.uarch); +#endif } std::vector CPUInfo::Features() { @@ -191,6 +212,7 @@ std::vector CPUInfo::Features() { { RiscV_C, "Compressed" }, { RiscV_V, "Vector" }, { RiscV_B, "Bitmanip" }, + { RiscV_Zicsr, "Zicsr" }, { CPU64bit, "64-bit" }, }; diff --git a/Common/RiscVEmitter.cpp b/Common/RiscVEmitter.cpp index 611c969889..0f45914170 100644 --- a/Common/RiscVEmitter.cpp +++ b/Common/RiscVEmitter.cpp @@ -50,8 +50,7 @@ static inline bool SupportsAtomic() { } static inline bool SupportsZicsr() { - // TODO - return false; + return cpu_info.RiscV_Zicsr; } static inline bool SupportsVector() {