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Fix step over handling of fpu branches

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Kingcom 2013-11-03 09:54:58 +01:00
parent 775915e523
commit eeb86fc105
3 changed files with 21 additions and 10 deletions
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20
Core/MIPS/MIPSAnalyst.cpp
View File

@ -446,15 +446,23 @@ namespace MIPSAnalyst {
u32 rs = cpu->GetRegValue(0, (int)MIPS_GET_RS(op));
switch (opInfo & CONDTYPE_MASK) {
case CONDTYPE_EQ:
info.conditionMet = (rt == rs);
if (MIPS_GET_RT(op) == MIPS_GET_RS(op)) { // always true
info.isConditional = false;
if (opInfo & IN_FPUFLAG) { // fpu branch
info.conditionMet = currentMIPS->fpcond == 0;
} else {
info.conditionMet = (rt == rs);
if (MIPS_GET_RT(op) == MIPS_GET_RS(op)) { // always true
info.isConditional = false;
}
}
break;
case CONDTYPE_NE:
info.conditionMet = (rt != rs);
if (MIPS_GET_RT(op) == MIPS_GET_RS(op)) { // always true
info.isConditional = false;
if (opInfo & IN_FPUFLAG) { // fpu branch
info.conditionMet = currentMIPS->fpcond != 0;
} else {
info.conditionMet = (rt != rs);
if (MIPS_GET_RT(op) == MIPS_GET_RS(op)) { // always true
info.isConditional = false;
}
}
break;
case CONDTYPE_LEZ:

8
Core/MIPS/MIPSTables.cpp
View File

@ -437,10 +437,10 @@ const MIPSInstruction tableCop1[32] = // 010001 xxxxx ..... ..... ...........
const MIPSInstruction tableCop1BC[32] = // 010001 01000 xxxxx ................
{
INSTR("bc1f", &Jit::Comp_FPUBranch, Dis_FPUBranch, Int_FPUBranch, IS_CONDBRANCH|IN_IMM16|IN_FPUFLAG|DELAYSLOT),
INSTR("bc1t", &Jit::Comp_FPUBranch, Dis_FPUBranch, Int_FPUBranch, IS_CONDBRANCH|IN_IMM16|IN_FPUFLAG|DELAYSLOT),
INSTR("bc1fl", &Jit::Comp_FPUBranch, Dis_FPUBranch, Int_FPUBranch, IS_CONDBRANCH|IN_IMM16|IN_FPUFLAG|DELAYSLOT|LIKELY),
INSTR("bc1tl", &Jit::Comp_FPUBranch, Dis_FPUBranch, Int_FPUBranch, IS_CONDBRANCH|IN_IMM16|IN_FPUFLAG|DELAYSLOT|LIKELY),
INSTR("bc1f", &Jit::Comp_FPUBranch, Dis_FPUBranch, Int_FPUBranch, IS_CONDBRANCH|IN_IMM16|IN_FPUFLAG|DELAYSLOT|CONDTYPE_FPUFALSE),
INSTR("bc1t", &Jit::Comp_FPUBranch, Dis_FPUBranch, Int_FPUBranch, IS_CONDBRANCH|IN_IMM16|IN_FPUFLAG|DELAYSLOT|CONDTYPE_FPUTRUE),
INSTR("bc1fl", &Jit::Comp_FPUBranch, Dis_FPUBranch, Int_FPUBranch, IS_CONDBRANCH|IN_IMM16|IN_FPUFLAG|DELAYSLOT|LIKELY|CONDTYPE_FPUFALSE),
INSTR("bc1tl", &Jit::Comp_FPUBranch, Dis_FPUBranch, Int_FPUBranch, IS_CONDBRANCH|IN_IMM16|IN_FPUFLAG|DELAYSLOT|LIKELY|CONDTYPE_FPUTRUE),
INVALID, INVALID, INVALID, INVALID,
//8
INVALID_X_8,

3
Core/MIPS/MIPSTables.h
View File

@ -43,6 +43,9 @@ struct MIPSInfo {
#define CONDTYPE_LTZ 0x00000005
#define CONDTYPE_GEZ 0x00000006
#define CONDTYPE_FPUFALSE CONDTYPE_EQ
#define CONDTYPE_FPUTRUE CONDTYPE_NE
// as long as the other flags are checked,
// there is no way to misinterprete these
// as CONDTYPE_X