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Some cleanup, re-enable some apparently disabled jit ops

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This commit is contained in:
Henrik Rydgard 2012-11-18 23:13:32 +01:00
parent 9ec858a64d
commit f326c36220
5 changed files with 13 additions and 14 deletions
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10
Core/MIPS/MIPS.cpp
View File

@ -77,7 +77,6 @@ void MIPSState::Reset()
SetWriteMask(b);
pc = 0;
prevPC = 0;
hi = 0;
lo = 0;
fpcond = 0;
@ -157,7 +156,6 @@ void MIPSState::RunLoopUntil(u64 globalTicks)
break;
}
#endif
prevPC = pc;
if (inDelaySlot)
{
MIPSInterpret(op);
@ -172,6 +170,7 @@ void MIPSState::RunLoopUntil(u64 globalTicks)
MIPSInterpret(op);
}
/*
if (!Memory::IsValidAddress(pc))
{
pc = pc;
@ -179,10 +178,13 @@ void MIPSState::RunLoopUntil(u64 globalTicks)
if (r[MIPS_REG_RA] != 0 && !Memory::IsValidAddress(r[MIPS_REG_RA]))
{
// pc = pc;
}
}*/
if (inDelaySlot)
{
CoreTiming::downcount -= 1;
goto again;
}
}
CoreTiming::downcount -= 1;
if (CoreTiming::GetTicks() > globalTicks)
@ -190,11 +192,9 @@ void MIPSState::RunLoopUntil(u64 globalTicks)
DEBUG_LOG(CPU, "Hit the max ticks, bailing : %llu, %llu", globalTicks, CoreTiming::GetTicks());
break;
}
}
CoreTiming::Advance();
// if (exceptions) checkExceptions();
if (CoreTiming::GetTicks() > globalTicks)
{
DEBUG_LOG(CPU, "Hit the max ticks, bailing : %llu, %llu", globalTicks, CoreTiming::GetTicks());

1
Core/MIPS/MIPS.h
View File

@ -112,7 +112,6 @@ public:
u32 pc;
u32 nextPC;
u32 prevPC;
u32 hi;
u32 lo;

4
Core/MIPS/MIPSTables.cpp
View File

@ -225,8 +225,8 @@ const MIPSInstruction tableSpecial[64] = /// 000000 ...... ...... .......... xxx
{-2},
INSTR("slt", &Jit::Comp_RType3, Dis_RType3, Int_RType3,IN_RS|IN_RT|OUT_RD),
INSTR("sltu", &Jit::Comp_RType3, Dis_RType3, Int_RType3,IN_RS|IN_RT|OUT_RD),
INSTR("max", &Jit::Comp_Generic, Dis_RType3, Int_RType3,IN_RS|IN_RT|OUT_RD),
INSTR("min", &Jit::Comp_Generic, Dis_RType3, Int_RType3,IN_RS|IN_RT|OUT_RD),
INSTR("max", &Jit::Comp_RType3, Dis_RType3, Int_RType3,IN_RS|IN_RT|OUT_RD),
INSTR("min", &Jit::Comp_RType3, Dis_RType3, Int_RType3,IN_RS|IN_RT|OUT_RD),
INSTR("msub", &Jit::Comp_Generic, Dis_MulDivType, Int_MulDivType, IN_RS|IN_RT|OUT_OTHER),
INSTR("msubu", &Jit::Comp_Generic, Dis_MulDivType, Int_MulDivType, IN_RS|IN_RT|OUT_OTHER),

10
Core/MIPS/x86/CompALU.cpp
View File

@ -161,17 +161,17 @@ namespace MIPSComp
case 33: //R(rd) = R(rs) + R(rt); break; //addu
CompTriArith(op, &XEmitter::ADD);
break;
case 134: //R(rd) = R(rs) - R(rt); break; //sub
case 135:
case 34: //R(rd) = R(rs) - R(rt); break; //sub
case 35:
CompTriArith(op, &XEmitter::SUB);
break;
case 136: //R(rd) = R(rs) & R(rt); break; //and
case 36: //R(rd) = R(rs) & R(rt); break; //and
CompTriArith(op, &XEmitter::AND);
break;
case 137: //R(rd) = R(rs) | R(rt); break; //or
case 37: //R(rd) = R(rs) | R(rt); break; //or
CompTriArith(op, &XEmitter::OR);
break;
case 138: //R(rd) = R(rs) ^ R(rt); break; //xor
case 38: //R(rd) = R(rs) ^ R(rt); break; //xor
CompTriArith(op, &XEmitter::XOR);
break;

2
Core/MemMapFunctions.cpp
View File

@ -82,7 +82,7 @@ inline void ReadFromHardware(T &var, const u32 address)
}
else
{
WARN_LOG(MEMMAP, "ReadFromHardware: Invalid address %08x PC %08x PPC %08x LR %08x", address, currentMIPS->pc, currentMIPS->prevPC, currentMIPS->r[MIPS_REG_RA]);
WARN_LOG(MEMMAP, "ReadFromHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
if (!g_Config.bIgnoreBadMemAccess) {
// TODO: Not sure what the best way to crash is...
exit(0);