diff --git a/Core/Debugger/DisassemblyManager.cpp b/Core/Debugger/DisassemblyManager.cpp index ab0e10aa9b..b57e52610d 100644 --- a/Core/Debugger/DisassemblyManager.cpp +++ b/Core/Debugger/DisassemblyManager.cpp @@ -709,22 +709,8 @@ void DisassemblyFunction::load() case 0x2B: // sw macro = new DisassemblyMacro(opAddress); - int dataSize; - switch (nextInfo & MEMTYPE_MASK) { - case MEMTYPE_BYTE: - dataSize = 1; - break; - case MEMTYPE_HWORD: - dataSize = 2; - break; - case MEMTYPE_WORD: - case MEMTYPE_FLOAT: - dataSize = 4; - break; - case MEMTYPE_VQUAD: - dataSize = 16; - break; - default: + int dataSize = MIPSGetMemoryAccessSize(next); + if (dataSize == 0) { delete macro; return; } diff --git a/Core/MIPS/MIPSAnalyst.cpp b/Core/MIPS/MIPSAnalyst.cpp index 353d7605d3..cdeaa6a169 100644 --- a/Core/MIPS/MIPSAnalyst.cpp +++ b/Core/MIPS/MIPSAnalyst.cpp @@ -611,25 +611,7 @@ namespace MIPSAnalyst { int OpMemoryAccessSize(u32 pc) { const auto op = Memory::Read_Instruction(pc, true); - MIPSInfo info = MIPSGetInfo(op); - if ((info & (IN_MEM | OUT_MEM)) == 0) { - return 0; - } - - // TODO: Verify lwl/lwr/etc.? - switch (info & MEMTYPE_MASK) { - case MEMTYPE_BYTE: - return 1; - case MEMTYPE_HWORD: - return 2; - case MEMTYPE_WORD: - case MEMTYPE_FLOAT: - return 4; - case MEMTYPE_VQUAD: - return 16; - } - - return 0; + return MIPSGetMemoryAccessSize(op); } bool IsOpMemoryWrite(u32 pc) { @@ -1553,21 +1535,7 @@ skip: // lw, sh, ... if (!IsSyscall(op) && (opInfo & (IN_MEM | OUT_MEM)) != 0) { info.isDataAccess = true; - switch (opInfo & MEMTYPE_MASK) { - case MEMTYPE_BYTE: - info.dataSize = 1; - break; - case MEMTYPE_HWORD: - info.dataSize = 2; - break; - case MEMTYPE_WORD: - case MEMTYPE_FLOAT: - info.dataSize = 4; - break; - - case MEMTYPE_VQUAD: - info.dataSize = 16; - } + info.dataSize = MIPSGetMemoryAccessSize(op); u32 rs = cpu->GetRegValue(0, (int)MIPS_GET_RS(op)); s16 imm16 = op & 0xFFFF; diff --git a/Core/MIPS/MIPSInt.h b/Core/MIPS/MIPSInt.h index cd52fc409b..039a5f597f 100644 --- a/Core/MIPS/MIPSInt.h +++ b/Core/MIPS/MIPSInt.h @@ -23,8 +23,6 @@ int MIPS_SingleStep(); namespace MIPSInt { - void Int_Unknown(MIPSOpcode op); - void Int_Unimpl(MIPSOpcode op); void Int_Syscall(MIPSOpcode op); void Int_mxc1(MIPSOpcode op); diff --git a/Core/MIPS/MIPSIntVFPU.h b/Core/MIPS/MIPSIntVFPU.h index 1d0a1ba1f1..fdd7954aa3 100644 --- a/Core/MIPS/MIPSIntVFPU.h +++ b/Core/MIPS/MIPSIntVFPU.h @@ -26,7 +26,6 @@ namespace MIPSInt void Int_SV(MIPSOpcode op); void Int_SVQ(MIPSOpcode op); void Int_Mftv(MIPSOpcode op); - void Int_MatrixSet(MIPSOpcode op); void Int_VecDo3(MIPSOpcode op); void Int_Vcst(MIPSOpcode op); void Int_VMatrixInit(MIPSOpcode op); diff --git a/Core/MIPS/MIPSTables.cpp b/Core/MIPS/MIPSTables.cpp index 48182a37b5..5a2065074b 100644 --- a/Core/MIPS/MIPSTables.cpp +++ b/Core/MIPS/MIPSTables.cpp @@ -1081,6 +1081,27 @@ int MIPSGetInstructionCycleEstimate(MIPSOpcode op) return GetInstructionCycleEstimate(instr); } +int MIPSGetMemoryAccessSize(MIPSOpcode op) { + MIPSInfo info = MIPSGetInfo(op); + if ((info & (IN_MEM | OUT_MEM)) == 0) { + return 0; + } + + switch (info & MEMTYPE_MASK) { + case MEMTYPE_BYTE: + return 1; + case MEMTYPE_HWORD: + return 2; + case MEMTYPE_WORD: + case MEMTYPE_FLOAT: + return 4; + case MEMTYPE_VQUAD: + return 16; + } + + return 0; +} + const char *MIPSDisasmAt(u32 compilerPC) { static char temp[256]; MIPSDisAsm(Memory::Read_Instruction(compilerPC), 0, temp); diff --git a/Core/MIPS/MIPSTables.h b/Core/MIPS/MIPSTables.h index fd12c43a96..484eab35ea 100644 --- a/Core/MIPS/MIPSTables.h +++ b/Core/MIPS/MIPSTables.h @@ -130,5 +130,6 @@ int MIPSInterpret_RunUntil(u64 globalTicks); MIPSInterpretFunc MIPSGetInterpretFunc(MIPSOpcode op); int MIPSGetInstructionCycleEstimate(MIPSOpcode op); +int MIPSGetMemoryAccessSize(MIPSOpcode op); const char *MIPSGetName(MIPSOpcode op); const char *MIPSDisasmAt(u32 compilerPC);