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48 Commits

Author SHA1 Message Date
Unknown W. Brackets
b9de1a44df jit: Reduce some include pollution. 
Usually no need for all of MIPSAnalyst.
 2022-10-27 23:26:44 -07:00
Unknown W. Brackets
cae0815095 jit: Avoid using mips identifier directly. 
Apparently this gets defined on mips systems.
 2021-02-26 07:24:58 -08:00
Florent Castelli
373db56a16 blackberry: Remove! 2016-10-11 17:40:32 +02:00
Unknown W. Brackets
fed687fb59 arm64: Meld LO and HI together for multiplies. 2015-07-02 20:31:37 -07:00
Henrik Rydgård
d014d420db Unify JitOptions across the backends. 
This is required to make ExtractIR not a member of the various backends.
 2015-04-12 11:41:26 -07:00
Unknown W. Brackets
afdbf5610b jit: Use nicknames for a few more static regs. 2014-12-17 01:11:33 -08:00
Unknown W. Brackets
cb7e7643db Blackberry buildfix. 2014-12-13 19:38:04 -08:00
Henrik Rydgard
05a8e2e35d Some work towards being able to build two JITs together 
This will be useful for testing/debugging, but not there yet.
 2014-12-13 21:13:54 +01:00
Unknown W. Brackets
f817d49dfb jit: Discard clobbered registers on spill. 
If we're spilling anyway, discard rather than saving.
 2014-12-07 23:08:21 -08:00
Unknown W. Brackets
9dd6bb56bb jit: Make available js_ and jo_ in regcaches. 2014-12-07 21:07:23 -08:00
Henrik Rydgard
51d55bd645 Namespacing cleanup (it's bad to do "using namespace" in a header) 2014-12-07 14:44:15 +01:00
Henrik Rydgard
d98bde8e50 Merge the RegCache changes from the old neon-vfpu branch 2014-12-06 12:26:58 +01:00
Unknown W. Brackets
f6f943de63 jit: MAP_NOINIT should always mean MAP_DIRTY. 2014-11-29 00:14:08 -08:00
Unknown W. Brackets
5a89c17cf0 armjit: Allow R1 in regalloc, use LR as temp. 
LR should be safe, although it may make stack traces not work within jit,
they don't really tend to work anyway.
 2014-03-28 18:38:38 -07:00
Henrik Rydgard
dca457e6df Optimize multiple sv.s and lv.s calls on ARM. Also some cleanup. 2013-11-19 21:41:47 +01:00
Unknown W. Brackets
98fb2e0402 armjit: Refer to R11 as MEMBASEREG for clarity. 2013-11-14 23:37:48 -08:00
Henrik Rydgård
ef8631c57f Cache VFPU_CTRL_CC in a register 2013-11-12 17:58:29 +01:00
Unknown W. Brackets
f4b5e8a4c1 Merge pull request #4518 from hrydgard/fpcond 
ARMJIT: Cache fpcond in a register to avoid store/load between compare and branch
 2013-11-12 01:50:16 -08:00
Henrik Rydgård
17074f5a7f Cache fpcond in a register to avoid store/load between compare and branch 2013-11-12 10:33:38 +01:00
Unknown W. Brackets
32504ed46e armjit: Prioritize spilling regs not used soon. 
This may improve trashing.
 2013-11-12 00:03:39 -08:00
Unknown W. Brackets
7e46ee0b0f armjit: Replace MOVI2R with using the regcache. 
So that it can optimize the value with existing imms.

Not actually optimizing yet.
 2013-11-10 15:50:45 -08:00
Unknown W. Brackets
d092f7dd2d armjit: Remember reg imm values even after flush. 
This way, we can base other imm values off them, or even do imm math using
them.  We can also avoid re-flushing an imm.
 2013-11-10 15:50:14 -08:00
Unknown W. Brackets
a3a061a69f armjit: Optimize a division by a power of two. 
These really happen.
 2013-11-09 08:43:53 -08:00
Unknown W. Brackets
6038d96b46 armjit: Flush regs using STMIA where possible. 2013-11-09 08:25:07 -08:00
Unknown W. Brackets
e686ff59bf armjit: Allocate regs in preferred slots. 
This may allow better flushing.  Not sure if these are the best regs,
but if they aren't it shouldn't really hurt.
 2013-11-09 08:25:07 -08:00
Unknown W. Brackets
cb3bb73148 armjit: Improve GPR typesafety. 2013-11-09 08:24:15 -08:00
Henrik Rydgard
58c39a38ee ARM regcache: Add mechanism to keep registers converted to pointers around 2013-11-09 16:57:29 +01:00
Henrik Rydgard
5a95e267fb Add an optimization to discard registers at the end of functions when possible. 
Works in some games but crashes many so hiding it for now. Do not add UI.
 2013-11-08 12:43:48 +01:00
Henrik Rydgard
3b9e6243eb Only flush the required registers on function calls (only implemented for real on ARM) 2013-07-28 22:21:43 +02:00
Sacha
056ae5db44 Buildfix for Qt. 2013-07-29 00:26:36 +10:00
Henrik Rydgard
59644ad59b Jit: Implement VMMUL for ARM, optimize the x86 implementation. Also add VCST. 2013-07-28 12:14:35 +02:00
Henrik Rydgard
76a937f489 ARMJIT Experiment: Keep downcount in a register. Needs benchmarking. 2013-07-27 17:27:26 +02:00
Henrik Rydgard
5a09885a59 Port over much of unknown's vfpu jit work to arm. Untested. 2013-02-20 00:04:21 +01:00
Henrik Rydgard
b8abb77eee More armjit-fpu work - dot product working for example. Add some non working DISABLEd stuff too. 2013-02-16 09:27:48 +01:00
Henrik Rydgard
048cf35922 More ARMJit FPU work - some instructions and optimizations. 2013-02-14 00:02:09 +01:00
Henrik Rydgard
4bdb2045a7 Armjit-FPU: Fix lots of bugs, impl some stuff. Still nothing working. 2013-02-11 23:10:11 +01:00
Henrik Rydgard
f75d14d3b5 ARM FPU jit work 2013-02-10 15:53:56 +01:00
Henrik Rydgard
1b4394ac5e ARM jit: jit integer multiplies. ARM is so nice, very clean. 2013-01-30 01:06:14 +01:00
Henrik Rydgard
68991511ee Split out the FPU reg cache into its own file too. 2013-01-26 01:34:19 +01:00
Sacha
5552f93fca Fixes for Qt, Symbian and Blackberry. Reorder and remove some redundant ArmEmitter includes so that _SP doesn't conflict. 2013-01-17 11:00:07 +10:00
Henrik Rydgard
66ee2e2933 Remove ArmABI.cpp/h, didn't need that stuff. 2013-01-14 22:19:18 +01:00
Henrik Rydgard
bc9c3db303 Armjit: Add option for fastmem. Small optimization. 2013-01-11 17:25:54 +01:00
Henrik Rydgard
9b791b9953 More ARMJIT optimization 2013-01-11 15:22:31 +01:00
Henrik Rydgard
209f1d79a9 SpillLock is now per MIPS register instead of per ARM register. Fix array size. 2013-01-09 23:14:21 +01:00
Henrik Rydgard
2f4e6eaf01 Remove allocLock until we need it 2013-01-09 22:46:27 +01:00
Henrik Rydgard
dafe2c389c More regalloc fixing and tweaks. Still not working the way I want it. 2013-01-09 13:38:44 +01:00
Henrik Rydgard
8c06edc47b It's getting close to the first totally unoptimized jit run. 2013-01-08 17:03:17 +01:00
Henrik Rydgard
a2ff416534 Rename files. Rewrite ArmRegCache from scratch. 2013-01-07 22:33:09 +01:00