Henrik Rydgard
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da1352c924
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Don't bother specifying smooth shading, it's the default.
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2014-12-02 00:57:51 +01:00 |
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Henrik Rydgård
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ae5d597b49
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Merge pull request #7115 from xebra/spline_bezier
spline/bezier fix and support flat shading
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2014-12-01 11:25:17 +01:00 |
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xebra
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f032936575
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Fix flat shading for unsupported hardware.
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2014-12-01 19:16:20 +09:00 |
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Henrik Rydgård
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4ada50cb6b
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Merge pull request #7123 from unknownbrackets/http-recent
Allow http:// URLs in the recent list
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2014-12-01 09:29:35 +01:00 |
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Unknown W. Brackets
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c16e5513b0
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Make GameInfo use FileLoader for more things.
This way it can actually load the assets of a recent http:// entry.
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2014-11-30 23:55:03 -08:00 |
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Unknown W. Brackets
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256ea0c062
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Verify recent file existance using a loader.
This way it supports remote files and doesn't wipe them.
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2014-11-30 23:54:22 -08:00 |
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Henrik Rydgård
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fa8ef3d837
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Merge pull request #7122 from unknownbrackets/jit-simd
x86jit: Fix more simd mapping
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2014-12-01 08:44:34 +01:00 |
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Unknown W. Brackets
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48b3a292d7
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x86jit: Add more sanity checks.
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2014-11-30 17:43:07 -08:00 |
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Unknown W. Brackets
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9cfe801075
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x86jit: Ensure we don't sequence temps+regs.
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2014-11-30 17:42:43 -08:00 |
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Unknown W. Brackets
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23e3916a77
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x86jit: Fix a stupid typo.
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2014-11-30 17:42:02 -08:00 |
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Henrik Rydgard
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a577e90c9e
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Merge branch 'jit-simd' of github.com:unknownbrackets/ppsspp into unknownbrackets-jit-simd
Conflicts:
Core/MIPS/x86/RegCacheFPU.cpp
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2014-11-30 23:35:35 +01:00 |
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Unknown W. Brackets
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515b954670
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x86jit: Re-enable vmmov simd.
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2014-11-30 13:06:53 -08:00 |
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Unknown W. Brackets
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c6b090d82e
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x86jit: When storing, verify alignment.
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2014-11-30 13:06:16 -08:00 |
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Henrik Rydgard
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1443f8f39a
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Add an assert to catch some unaligned movaps
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2014-11-30 22:04:09 +01:00 |
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Unknown W. Brackets
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fbc453b083
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x86jit: Oops, here also.
Maybe I should kill these early returns after all..
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2014-11-30 12:39:30 -08:00 |
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Unknown W. Brackets
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5758102be6
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x86jit: Correct handling of temp vregs in VS.
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2014-11-30 12:33:06 -08:00 |
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Unknown W. Brackets
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750f40e260
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x86jit: Oops, forgot to add this back.
MapRegV() will be too dangerous if it locks so do it here.
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2014-11-30 11:02:55 -08:00 |
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Henrik Rydgård
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2945a1acc1
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Merge pull request #7120 from unknownbrackets/jit-simd
x86jit: Add a MAP_NOLOCK flag
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2014-11-30 19:43:35 +01:00 |
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Unknown W. Brackets
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29e3819437
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x86jit: Improve spilling in vf2i.
This should improve which ones we spill on 32 bit at least.
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2014-11-30 10:38:58 -08:00 |
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Unknown W. Brackets
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0000be1bb2
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x86jit: Add a MAP_NOLOCK flag to not lock.
Only for MapRegs*. And then lock all by default, including
TryMapRegsVS().
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2014-11-30 10:36:44 -08:00 |
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Unknown W. Brackets
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52cfe4a8a3
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x86jit: Avoid MOVSS into self.
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2014-11-30 10:35:26 -08:00 |
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Henrik Rydgard
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466cdb8ddf
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x86 Jit: Basic implementation of SIMD vmmul. Can be improved.
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2014-11-30 19:27:43 +01:00 |
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Henrik Rydgard
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74e70f1159
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Fix silly typo
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2014-11-30 17:24:56 +01:00 |
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Henrik Rydgard
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ac772f25ff
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x86 JIT: Join adjacent vrot calls together to avoid redundant sin/cos calls. Add a prototype, fix minor issues.
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2014-11-30 11:04:13 +01:00 |
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Henrik Rydgård
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7deb8055ee
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Merge pull request #7117 from unknownbrackets/jit-simd
x86jit: Implement vmmov using SIMD
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2014-11-30 09:24:22 +01:00 |
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Henrik Rydgård
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7f65e81fa9
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Merge pull request #7118 from unknownbrackets/jit-simd2
x86jit: Correctly use available regs for simd load
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2014-11-30 09:23:10 +01:00 |
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Unknown W. Brackets
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679a824487
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x86jit: when reusing a reg, don't zap slot.
If we returned the same reg it was in before, don't zap the slots because
slot #1 may be valid.
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2014-11-29 23:11:50 -08:00 |
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Unknown W. Brackets
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c3578bd8eb
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x86jit: Find the correct available regs.
If there aren't n available regs, they may not of course be in slots 0 and
1. Have to go and find them.
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2014-11-29 22:12:40 -08:00 |
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Unknown W. Brackets
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df6a07f24e
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x86jit: Allow only one reg for sequential load.
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2014-11-29 22:11:52 -08:00 |
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Unknown W. Brackets
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bb26e4f7d0
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x86jit: Implement vmmov using SIMD.
4x -> 87x in microbenchmarking.
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2014-11-29 18:46:38 -08:00 |
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Unknown W. Brackets
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25a8752dcb
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Update armips (fixes #7114.)
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2014-11-29 09:12:32 -08:00 |
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Unknown W. Brackets
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67608639c5
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x86jit: Oops, can't have loaded regs here yet.
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2014-11-29 09:07:25 -08:00 |
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xebra
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b683e8851c
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Merge branch 'master' into spline_bezier
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2014-11-29 22:26:47 +09:00 |
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xebra
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fe051f30a2
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[spline/bezier]Fix surface normal at flat shading.
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2014-11-29 21:58:11 +09:00 |
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Henrik Rydgård
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14bb92cdd1
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Merge pull request #7113 from Kingcom/master
Update assembler
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2014-11-29 13:47:55 +01:00 |
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Kingcom
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2159e3b3b6
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Update armips
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2014-11-29 13:12:55 +01:00 |
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Henrik Rydgard
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8bd20ed8d1
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x86 jit: Implement matrix init ops in SIMD. Turn off SIMD again by default (oops)
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2014-11-29 12:30:21 +01:00 |
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Henrik Rydgard
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8f016d3e48
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Merge some matrix utils and stuff from the NEON branch
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2014-11-29 11:37:45 +01:00 |
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Henrik Rydgard
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66d74981b5
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Merge ARM emitter updates from the NEON branch
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2014-11-29 10:49:22 +01:00 |
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Henrik Rydgård
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ae15722a2e
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Merge pull request #7112 from unknownbrackets/jit-simd
jit: MAP_NOINIT should always mean MAP_DIRTY
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2014-11-29 10:19:33 +01:00 |
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Unknown W. Brackets
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f6f943de63
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jit: MAP_NOINIT should always mean MAP_DIRTY.
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2014-11-29 00:14:08 -08:00 |
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xebra
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34fe8300ab
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Support flat shading.
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2014-11-28 18:59:14 +09:00 |
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Henrik Rydgard
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32c81c3265
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x86 jit vcrsp.t: Oops, don't "SimpleReg" before doing the SIMD solution..
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2014-11-28 01:06:32 +01:00 |
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Henrik Rydgard
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344f71b092
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x86 jit: Commit commented-out haddps-based vdot.q as reminder not to use haddps...
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2014-11-28 00:19:11 +01:00 |
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Henrik Rydgård
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6ea5f6ab02
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Merge pull request #7104 from Kingcom/Assembler
Replace assembler with a submodule
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2014-11-27 23:56:49 +01:00 |
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Henrik Rydgard
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8f4d322dc6
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Another oops...
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2014-11-27 23:33:03 +01:00 |
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Henrik Rydgard
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bcdfb496a0
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Oops, bad merge
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2014-11-27 23:12:57 +01:00 |
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Henrik Rydgard
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c5bf3adec0
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x86 jit: use the correct fp move instruction, minor optimization in vdot
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2014-11-27 23:08:15 +01:00 |
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xebra
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b0ab0295ba
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[spline/bezier]Fix decoded buffer access violation.
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2014-11-27 19:01:07 +09:00 |
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Henrik Rydgård
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811e6aea48
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Merge pull request #7109 from unknownbrackets/jit-simd
x86jit: More fixes / tweaks to simd
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2014-11-27 10:24:28 +01:00 |
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