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243 Commits

Author SHA1 Message Date
Unknown W. Brackets
bc541bd020 irjit: Encode downcount directly as a constant. 
Simpler this way, now.
 2018-01-03 23:32:31 -08:00
Unknown W. Brackets
cffb2d61a7 irjit: Embed constant inside IRInst. 
This simplifies a bunch of code and improves compile performance by about
30%, at the cost of a bit more memory.
 2018-01-03 23:24:04 -08:00
Unknown W. Brackets
64b57a0329 irjit: Fix swr typo. 
Shifting the wrong direction - oops.
 2018-01-03 08:14:25 -08:00
Henrik Rydgård
3ac2350ad6 IR Interpreter: Add a comment, minor cleanup, minor SSE stuff. 2018-01-03 16:31:55 +01:00
Unknown W. Brackets
b11858d9a0 irjit: Properly account for delay slots in size. 
Otherwise we think blocks are 4 bytes too short, which can affect
invalidation.
 2018-01-01 22:54:40 -08:00
Unknown W. Brackets
3abcc4d6d8 irjit: Implement lwl/lwr/swl/swr. 
This is very similar to the arm64jit implementation.
 2018-01-01 08:38:13 -08:00
Unknown W. Brackets
b37ba9e599 irjit: Add options for compile/optimize steps. 
This way the backend can set flags for the type of IR it wants.  It's
seems too complex to combine certain things like lwl/lwr in a pass.
 2018-01-01 08:38:12 -08:00
Unknown W. Brackets
671be24105 irjit: Add extra temps to make lwl/swl/etc. easier. 2018-01-01 08:38:11 -08:00
Unknown W. Brackets
905d2c2da6 irjit: Cleanup some invalid op handling. 
And log blocks the same way as other backends.
 2018-01-01 08:38:11 -08:00
Unknown W. Brackets
8ffb0101fe jit: Report blocks with uneaten VFPU prefixes. 
There may be options to avoid, like continuing these blocks, especially if
they're likely or something.
 2018-01-01 08:38:10 -08:00
Unknown W. Brackets
3af78883c7 irjit: Speed up icache block invalidation. 
Turns out, in games using a ton of small memcpys, this was causing perf
issues.
 2017-12-31 10:37:09 -08:00
Unknown W. Brackets
8c2edd432b irjit: Allow continuing from mips break. 
Some games currently generate break instructions, and can be played
otherwise.  Should be fixed, but let's not hard crash.
 2017-12-25 10:21:22 -08:00
Henrik Rydgård
0207739d76 Can't call functions through known-nil pointers, even if they don't touch local data - LLVM's optimizer might have done something stupid. 2017-11-30 01:07:03 +01:00
Henrik Rydgård
22e65ba80d Get rid of ugly alignment macros and some other cruft, we now have alignas(16) from C++11 2017-08-31 01:14:51 +02:00
Unknown W. Brackets
33b073c545 Jit: Fix syscall outside delay slot. 
Doesn't happen in real games, but useful in debug code.
 2017-06-04 10:39:01 -07:00
Unknown W. Brackets
b483444fab IR: Cleanup some invalid ops. 2017-04-20 21:11:40 -07:00
Henrik Rydgard
b0bd7e3c6f Minor changes for compatibility with VS2017 2017-03-12 17:33:00 +01:00
Henrik Rydgård
635b2ada43 Remove a function that didn't make a lot of sense. 2017-01-26 09:50:16 +01:00
Henrik Rydgard
5d5f10d956 Attempts to counter crashes seen in the Google Play developer console 2016-12-01 22:07:03 +01:00
Florent Castelli
4145b60a0e symbian: Remove! 2016-10-11 18:49:08 +02:00
Henrik Rydgård
ea6b72d4c9 Merge pull request #8888 from unknownbrackets/warnings 
Warning fixes
 2016-08-06 10:59:06 +02:00
Unknown W. Brackets
fd546ff21d Fix some type comparison warnings. 2016-08-05 10:47:45 -07:00
Unknown W. Brackets
e55198f7e7 Correct some initialization order warnings. 
Also, another missing init with IRBlocks.
 2016-08-05 10:46:11 -07:00
Unknown W. Brackets
9972e5b10a Debugger: Allow logging on CPU breakpoints. 2016-08-04 12:39:29 -07:00
Henrik Rydgard
eb72a746b9 Fix one possible (reproducible!) startup crash in IRJit. May help #8848 2016-07-25 00:21:01 +02:00
Henrik Rydgård
c6d4966067 Make really sure we're not using the IRBlock copy constructor other than on Symbian. 
Turns out it ended up being used on Mac, and our asserts just debugprint and don't actually assert...
 2016-07-09 09:32:41 +02:00
Henrik Rydgard
e0845b876f Fix some bugs in the IRJit. Hopefully helps #8848 2016-07-08 00:05:44 +02:00
Henrik Rydgård
1091fd2dc0 Merge pull request #8840 from unknownbrackets/ir-vfpu 
Minor IR cleanup in the VFPU
 2016-07-04 10:02:52 +02:00
Unknown W. Brackets
1de4943632 jit-ir: Avoid crash in stack walk. 
This can happen if something is data, I suppose, and not a valid block.
 2016-07-02 20:51:06 -07:00
Unknown W. Brackets
4578c3cb54 jit-ir: Implement memory breakpoints. 
These generally work, but likely delay slots will make downcount slightly
off, and won't resume when you hit run again without manually stepping
through them.
 2016-07-02 16:38:30 -07:00
Unknown W. Brackets
7cd666c351 jit-ir: Decrease downcount after delayslot. 
Except for likely delay slots.  This makes breakpoints work more
correctly when they trigger within a delay slot.
 2016-07-02 16:35:56 -07:00
Unknown W. Brackets
1df08518ae jit-ir: Implement basic icache clear. 2016-07-01 17:27:24 -07:00
Unknown W. Brackets
6fb34d0bee jit-ir: Add initial breakpoint support. 
No memory breakpoints yet, and cache isn't cleared yet so these don't work
exactly the way you might expect...
 2016-07-01 17:15:57 -07:00
Unknown W. Brackets
8fab3dc91b jit-ir: Allow 3x3 and 2x2 vmmov in IR. 
While this will generate a lot of FMovs, it should still be better than
bailing to interp.
 2016-07-01 14:08:32 -07:00
Unknown W. Brackets
65394f1dba jit-ir: Fix vbfy with overlap. 2016-07-01 14:08:31 -07:00
Unknown W. Brackets
4761c0aa3f jit-ir: Allow SIMD on vabs/vneg. 2016-07-01 14:08:31 -07:00
Unknown W. Brackets
a450a79f52 jit-ir: Optimize loads to transfers if possible. 
These (especially float <-> gpr) happen in all games, but gpr->gpr is
especially common in some minis.  Good to reduce bloat.
 2016-05-29 18:34:41 -07:00
Unknown W. Brackets
b09c2b1f75 Add some missing override definitions. 2016-05-21 09:29:03 -07:00
Unknown W. Brackets
ee31f09b67 Buildfix. 2016-05-18 07:12:21 -07:00
Unknown W. Brackets
5534fba72c jit-ir: Add load/store reorder and merge passes. 
Can do more in merge, potentially.  Maybe it's not useful...
 2016-05-17 21:24:13 -07:00
Unknown W. Brackets
a9cdf7651e jit-ir: Mark prefixes unknown in mtv. 2016-05-17 21:22:57 -07:00
Unknown W. Brackets
b1c7f3dd3f jit-ir: Correct vx2i with partial overlap. 2016-05-17 21:22:23 -07:00
Henrik Rydgard
fff898b526 Log the block when "uneaten prefix" happens 2016-05-16 00:05:03 +02:00
Henrik Rydgard
dc772e6f3a Add missing cases to simplify pass 2016-05-15 23:39:42 +02:00
Henrik Rydgard
f544364c4a Fix bug in vus2i (thanks unknown), recognize vectors in IR disasm 2016-05-15 23:35:33 +02:00
Unknown W. Brackets
e960158490 jit-ir: Add notes and report about vrot prefixes. 2016-05-15 14:08:59 -07:00
Unknown W. Brackets
ab1461faca Add prefix handling to vfpu color conv per tests. 2016-05-15 13:16:03 -07:00
Unknown W. Brackets
3f0fc2d851 jit-ir: Fix FSat0_1 behavior on -0.0f. 2016-05-15 13:10:49 -07:00
Unknown W. Brackets
6bf1390603 Fix timing drift on CoreTiming::ForceCheck(). 
Since -1 -(-1) = 0, we'll never think we moved forward this way.
 2016-05-15 12:43:34 -07:00
Henrik Rydgard
d6c2b6e9ae Most of vi2x 2016-05-15 11:46:01 +02:00
Henrik Rydgard
905af75925 vx2i, vbfy, vsgn 2016-05-15 10:57:43 +02:00
Henrik Rydgard
7046f960e5 IR: Add vrot 2016-05-15 10:36:18 +02:00
Henrik Rydgård
168573e711 Merge pull request #8740 from unknownbrackets/ir-vfpu 
More VFPU comments, implement vmscl
 2016-05-15 10:08:22 +02:00
Unknown W. Brackets
e140d36818 ir-jit: Oops, fix matrix scale + tranpose. 2016-05-15 00:59:17 -07:00
Henrik Rydgård
205419a72e Merge pull request #8741 from unknownbrackets/ir-alu 
IR the remaining ALU ops, correct div by zero
 2016-05-15 09:43:41 +02:00
Unknown W. Brackets
c606f64f71 jit-ir: Add div/divu instructions. 2016-05-14 19:23:52 -07:00
Unknown W. Brackets
6413b44434 jit-ir: Enable IR for madd(u)/msub(u). 2016-05-14 19:23:51 -07:00
Unknown W. Brackets
a05ae2a0a6 Correct divide by zero HI/LO values a bit. 
Interpreter is now correct, but it's probably not all that important to
get right in jit.
 2016-05-14 19:23:50 -07:00
Unknown W. Brackets
4ac773e8b4 jit-ir: Implement bit reverse instruction. 2016-05-14 18:21:42 -07:00
Unknown W. Brackets
8a3dce3b8b jit-ir: Comment most of the vfpu ops. 2016-05-14 17:35:04 -07:00
Unknown W. Brackets
e1dbcd724e jit-ir: Oops, correct vtfm for transposed case. 
The ones that are aligned are here in this case.  Fixes crash in Crisis
Core.
 2016-05-14 16:20:39 -07:00
Unknown W. Brackets
01d63a1a9d jit-ir: Implement vmscl. 2016-05-14 16:20:21 -07:00
Unknown W. Brackets
2e097b8996 Oops, typos. 2016-05-14 14:28:05 -07:00
Unknown W. Brackets
d5d77b41f9 jit-ir: Properly flip vtfm simd cases. 
Disable the broken one and add clearer comments.
 2016-05-14 14:23:18 -07:00
Unknown W. Brackets
7c9f368d63 jit-ir: Add some descriptions of mnemonics. 
Sometimes I forget what vhdp etc. meant, let's make the VFPU code a bit
more accessible.
 2016-05-14 14:21:53 -07:00
Henrik Rydgård
8f430e9631 Merge pull request #8736 from unknownbrackets/ir-clear 
Clear emuhacks on IR block destroy and save state
 2016-05-14 18:51:39 +02:00
Unknown W. Brackets
1f28d802a3 FreeBSD buildfix. 
We need Common to have the right _M_SSE define.  Also, let's not define
SSE4 until we need it, since we might need ifs.
 2016-05-14 09:06:56 -07:00
Unknown W. Brackets
e37777648e jit-ir: Restore emuhacks before saving state. 
Let's just ask jit to do this, not its block cache directly.
 2016-05-14 08:59:44 -07:00
Unknown W. Brackets
b74df87db0 jit-ir: Clear emuhacks on block destroy. 2016-05-14 08:40:53 -07:00
Henrik Rydgard
0541fe36df Symbian buildfix, fix for fpu test 2016-05-14 15:26:43 +02:00
Henrik Rydgard
b612806ee4 Remove accidentally added file 2016-05-14 14:32:43 +02:00
Henrik Rydgard
64eda6a4ec IR: Split Syscall into Syscall and ExitToPC, so we can put ApplyRoundingMode in between. 2016-05-14 14:32:22 +02:00
Henrik Rydgard
91bc3c31a5 Warning fixes 2016-05-14 14:01:27 +02:00
Henrik Rydgard
7a7c3b9b9f More VFPU, vmmul thoughts 2016-05-14 14:00:01 +02:00
Unknown W. Brackets
efc8a8e353 Hack to make Symbian build. 2016-05-13 23:56:17 -07:00
Henrik Rydgard
b7091a8f5d Simplifications and fixes 2016-05-13 21:02:23 +02:00
Henrik Rydgard
5923013d65 Simple workaround for timing issue with coreState after syscall. 
Also fixes off by one in ForceCheck.
 2016-05-13 20:21:19 +02:00
Henrik Rydgard
5b2504120d Optimize some common prefixes 2016-05-13 20:15:20 +02:00
Henrik Rydgard
91a6cf5e44 Add a couple more passes (2-op, optimize f<->v fp moves) 2016-05-13 20:14:03 +02:00
Henrik Rydgard
f636b2a315 Minor build and other fixes 2016-05-13 19:31:27 +02:00
Unknown W. Brackets
066b0b7fdf jit-ir: Optimize out beql; break; sequences. 
These are often used following divs, and are harmless.  Things get a bit
easier if we just never compile them.
 2016-05-13 07:59:39 -07:00
Unknown W. Brackets
7b43e0e59d jit-ir: Add nan/inf compares. 
Without this, Gods Eater Burst crashes before going in game.
 2016-05-12 22:53:21 -07:00
Unknown W. Brackets
9e3572dc63 jit-ir: Improve vidt to handle more cases. 2016-05-12 22:40:26 -07:00
Unknown W. Brackets
f52120353b jit-ir: Apply prefixes for vector init ops. 
Without this, Gods Eater Burst is horribly broken.
 2016-05-12 22:29:31 -07:00
Unknown W. Brackets
c11c0465de jir-ir: Correct vftm SIMD regs. 2016-05-12 21:29:58 -07:00
Unknown W. Brackets
1ddb2fbfb9 jit-ir: Fix non-SSE Vec4Scale. 2016-05-12 21:02:56 -07:00
Unknown W. Brackets
57b3dbff7e jit-ir: Avoid flushing on a few Vec4 ops. 2016-05-12 21:01:46 -07:00
Unknown W. Brackets
a8126ca132 jit-ir: Add some missing CONDITIONAL_DISABLEs. 2016-05-12 20:56:47 -07:00
Unknown W. Brackets
29ed8d2201 jit-ir: ExitToReg doesn't write to registers. 2016-05-12 18:34:27 -07:00
Unknown W. Brackets
9f183c97ba jit-ir: Prevent reading ahead for each reg write. 2016-05-12 18:30:55 -07:00
Unknown W. Brackets
d06c6c080c jit-ir: Expand unused regs to regular GPRs. 2016-05-12 18:30:55 -07:00
Unknown W. Brackets
99468c6fc1 jit-ir: Optimize out unused temp regs. 
This way, if constants have made the temp obsolete (common with ins, for
example), it won't even get set anymore.
 2016-05-12 18:30:53 -07:00
Henrik Rydgard
7268abec61 IR: vcmp, vcmov, vhdp 2016-05-12 22:35:31 +02:00
Henrik Rydgard
1851458628 Bugfixes 2016-05-12 20:28:59 +02:00
Henrik Rydgard
c69a8c07dc Forgot this 2016-05-12 20:20:59 +02:00
Henrik Rydgard
850d0abc91 IR: More VFPU. Support normal fp compares. 2016-05-12 20:16:15 +02:00
Henrik Rydgard
182674cddf IR: SIMD another matrix orientation. Fix various issues. 2016-05-12 13:10:26 +02:00
Henrik Rydgard
2cbfb192c4 IR: Lots more VFPU support, some with SIMD 2016-05-12 12:17:25 +02:00
Henrik Rydgard
219548b8e2 Prefix prep 2016-05-11 00:16:07 +02:00
Henrik Rydgard
b3dd36982f Prefix prep 2016-05-10 23:14:26 +02:00
Henrik Rydgard
db1d1ff9fd IR: Merge the FPU and VFPU instruction sets, no reason to keep them apart 2016-05-10 22:55:27 +02:00
Henrik Rydgard
45efcda6b1 IR: Some more VFPU 2016-05-10 21:50:08 +02:00
Henrik Rydgard
558bb197c7 More VFPU 2016-05-09 23:47:56 +02:00
Henrik Rydgard
a5d5c5ce2b Do the voffset remapping before the IR. This will let us easily add some virtual VFPU registers for the IR to the end, plus it's slightly faster. 2016-05-09 22:40:59 +02:00
Henrik Rydgard
28087a6088 IRFrontend shouldn't know about IRBlock 2016-05-09 20:18:22 +02:00
Henrik Rydgard
e711a47a75 Complete the separation of the IR compiler frontend from the "Jit" 2016-05-09 20:05:06 +02:00
Henrik Rydgard
e806c369b2 Separate the IR frontend from the IR "Jit" 2016-05-09 19:57:18 +02:00
Henrik Rydgard
6e44e97ffa Refactor prep: Split JitInterface into MIPSFrontendInterface and JitInterface 2016-05-09 19:41:39 +02:00
Henrik Rydgard
f50617d679 Skip const flush on set float constant 2016-05-09 18:47:53 +02:00
Unknown W. Brackets
eb6551d72a jit-ir: Correct downcount handling. 
Oops, was wrong - already accounted for delay slots.  Clear so we don't
double count when emitting a syscall.

Fixes FF4 utility msg flickering.
 2016-05-09 01:13:53 -07:00
Unknown W. Brackets
ccb8f8d77e jit-ir: Fix replacement hooks. 2016-05-09 00:36:38 -07:00
Unknown W. Brackets
f6d245f3c4 jit-ir: Remove redundant simplify pass. 
This is just doing the same thing as the const folding pass, really.
 2016-05-09 00:13:01 -07:00
Unknown W. Brackets
f638477b9a jit-ir: Add the rest to PropagateConstants. 
Just for completeness.
 2016-05-08 22:17:39 -07:00
Unknown W. Brackets
7ce923d01f jit-ir: Fix SetConstV. 
Oops.
 2016-05-08 22:11:53 -07:00
Unknown W. Brackets
6bd31ecb27 jit-ir: Flush consts better for a few f/v ops. 2016-05-08 21:37:46 -07:00
Unknown W. Brackets
5221a02db4 jit-ir: Propagate constants for shifts. 
This might optimize away an IRTEMP_0 in such cases.
 2016-05-08 19:11:58 -07:00
Unknown W. Brackets
a1b4b5170c jit-ir: Propagate constants even for overlaps. 2016-05-08 19:05:39 -07:00
Unknown W. Brackets
a22ff68e9e jit-ir: Skip flushing when updating PC. 2016-05-08 18:49:00 -07:00
Unknown W. Brackets
d09f3a22a8 jit-ir: Propagate single-op constants. 2016-05-08 16:21:17 -07:00
Unknown W. Brackets
0d7f151167 jit-ir: Add a utility func for applying passes. 2016-05-08 16:08:35 -07:00
Unknown W. Brackets
d19174b52b jit-ir: Skip const flush on downcount op. 
This allows discarding more unused constants.
 2016-05-08 14:56:43 -07:00
Henrik Rydgard
c7e4658b6d More constant propagation 2016-05-08 23:25:47 +02:00
Henrik Rydgard
d4480d50fd jit-ir: Less instructions cause flushing in constant propagation. 2016-05-08 23:25:08 +02:00
Unknown W. Brackets
5dbac165f4 Qt, gcc, and Symbian buildfixes. 2016-05-08 14:10:07 -07:00
Henrik Rydgard
4e52f613f1 Additional fixes and buildfixes 2016-05-08 22:23:51 +02:00
Henrik Rydgard
f8659b8e1e Move the IR interpreter out into its own file. Rename it in the UI. First CMake and Android fixes. 2016-05-08 22:06:13 +02:00
Henrik Rydgard
492ea5fac4 Address a bunch of comments, thanks for the review 2016-05-08 21:38:03 +02:00
Henrik Rydgard
3eb5480ade Initial VFPU 2016-05-08 13:32:22 +02:00
Henrik Rydgard
98113edbd4 More simplify pass 2016-05-08 11:29:11 +02:00
Henrik Rydgard
14df39d7c9 Fix IRTEMP clash bug. Add more cases to the constant propagation pass. 2016-05-08 10:36:37 +02:00
Henrik Rydgard
aae32bd929 ir-jit: Re-enable mult. Fix bvf/bvt 2016-05-08 02:47:19 +02:00
Henrik Rydgard
46e839b2b2 ir-jit: Fix bugs in rounding 2016-05-08 02:26:36 +02:00
Henrik Rydgard
e750987052 ir-jit: Fix bug in ext 2016-05-08 02:09:01 +02:00
Henrik Rydgard
7d4774db4c Fix wsbw 2016-05-08 02:08:25 +02:00
Henrik Rydgard
1a2edc67d0 Add support for float store/load 2016-05-08 02:03:11 +02:00
Henrik Rydgard
ce8aae5ed1 Make the IRJit core selectable in developer tools 2016-05-08 01:43:27 +02:00
Henrik Rydgard
09969c0156 Use the regcache in a new (incomplete) pass, PropagateConstants. 2016-05-08 01:06:07 +02:00
Henrik Rydgard
a33f8b68c6 ir-jit: Get rid of the regcache. Should be replaced with optimization passes. 2016-05-07 23:12:53 +02:00
Henrik Rydgard
750d520cc7 Initial work on mult and friends. Fix another bug. 2016-05-07 22:27:58 +02:00
Henrik Rydgard
3c5510e5a3 Disable debug file logging, fix issue with replacement functions, etc 2016-05-07 21:35:12 +02:00
Henrik Rydgard
12edfcea5a Enough to run cpu_alu.prx. 2016-05-07 21:00:30 +02:00
Henrik Rydgard
4acf85aa06 It's kind of starting to run 2016-05-07 17:37:19 +02:00
Henrik Rydgard
d399c4a470 Initial commit for IRJit 2016-05-07 13:58:29 +02:00