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37,769 Commits 70 Branches 122 Tags 686 MiB
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Author SHA1 Message Date
Henrik Rydgård
ff6e118fff Get rid of a lot of ifdefs around presentation mode. Instead, set things dynamically. 2023-08-14 11:02:29 +02:00
Henrik Rydgård
870c45edd7 Fix flipped check for debug overlays 2023-08-14 11:02:29 +02:00
Henrik Rydgård
bec9c5611e Rename PresentationMode to PresentMode 2023-08-14 11:02:29 +02:00
Henrik Rydgård
1beb01af6a
Merge pull request #17905 from unknownbrackets/irjit-opt 
irjit: Implement some missing, handle partial Vec4s more
 2023-08-14 07:49:45 +02:00
Henrik Rydgård
63b3b31feb
Merge pull request #17906 from unknownbrackets/riscv-blocklink 
riscv: Fix crash on clear icache
 2023-08-14 07:42:38 +02:00
Henrik Rydgård
a7bc70834c
Merge pull request #17907 from unknownbrackets/riscv-minor 
riscv: Implement vs2i
 2023-08-14 07:41:45 +02:00
Henrik Rydgård
f4d753cce9
Merge pull request #17904 from unknownbrackets/ui-minor 
Fix crash from fontconfig
 2023-08-14 07:40:13 +02:00
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2aa4592330 SDL: Skip FcFini() call, causes crashes. 
Apparently this is a relatively well known problem and various people have
commented this out, including in Chromium for the last 10 years...
 2023-08-13 19:36:17 -07:00
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eb43bfc541 Build: Add draw_text_sdl to MSVC project. 
This way we can easily see it.
 2023-08-13 19:36:17 -07:00
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52cc38bf2a riscv: Implement vs2i. 2023-08-13 18:27:19 -07:00
Unknown W. Brackets
3f8f8d36d9 riscv: Fix crash on clear icache. 
Oops, can't avoid marking all blocks invalid.  Luckily a syscall should
always take more bytes than the bail invalidated block code.
 2023-08-13 18:25:46 -07:00
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159b41a0fa irjit: Fuse unaligned svl.q/svr.q together. 
They're almost never used outside paired, which we can do on most
platforms easily.
 2023-08-13 18:10:40 -07:00
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5729de90d2 irjit: Use more partial Vec4s / Vec4Blend. 2023-08-13 18:10:40 -07:00
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2e6dbab5fa irjit: Add flag to prefer Vec4, use for add/sub. 
This will improve things when using SIMD.
 2023-08-13 18:10:40 -07:00
Unknown W. Brackets
e0be6858b8 irjit: Implement vcrs.t. 
As used in Jeanne d'Arc.
 2023-08-13 18:10:12 -07:00
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217a1837ed irjit: Allow typical prefixes in vdiv/vasin/etc. 
Some of these behave strangely, but there are some common usages that work
fine.
 2023-08-13 18:10:07 -07:00
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87668a5720
Merge pull request #17902 from hrydgard/ui-bugfixes 
Some debug overlays don't make sense when not in-game, disable them
 2023-08-13 13:13:16 -07:00
Henrik Rydgård
dc4de340b3 Some debug overlays don't make sense when not in-game, disable them. Minor feedback fixes. 2023-08-13 21:54:24 +02:00
Henrik Rydgård
5a9a2bf6fe
Merge pull request #17779 from EmulatorJS/master 
Cleanup emscripten libretro target
 2023-08-13 21:40:24 +02:00
Henrik Rydgård
2cdcc413b7
Merge pull request #17898 from unknownbrackets/irjit-vfputemps 
irjit: Cleanup/purge FPU/VFPU temps
 2023-08-13 21:08:00 +02:00
Henrik Rydgård
5dcd14b17a
Merge pull request #17901 from unknownbrackets/riscv-disasm 
riscv: Add debug log of block disasm
 2023-08-13 21:07:37 +02:00
Henrik Rydgård
7127ebbb47
Merge pull request #17897 from hrydgard/opengl-separate-present-take-2 
OpenGL: Separate submit and present, take 2
 2023-08-13 21:05:10 +02:00
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f03cd0b2ad
Merge pull request #17899 from unknownbrackets/riscv-minor 
Minor RISC-V cleanups, frame profiler fix
 2023-08-13 11:19:42 -07:00
Henrik Rydgård
d6cdb6e5d9
Merge pull request #17900 from unknownbrackets/irjit-vsgelt 
irjit: Implement vsge/vslt
 2023-08-13 19:59:14 +02:00
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23c79f8e7f irjit: Implement vsge/vslt. 
These are not ideal especially for SIMD, but they do work.
Improves performance in Silent Hill on RISC-V by like 20%.
 2023-08-13 10:40:47 -07:00
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5d20f2aabd irjit: Simplify VecDo3. 2023-08-13 10:40:47 -07:00
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2b36e0a625 irjit: ZeroFpCond -> FpCondFromReg. 
We already have a zero reg, so this is more useful and symmetrical.
 2023-08-13 10:40:47 -07:00
Unknown W. Brackets
2bb67db43c riscv: Switch to the logBlocks model for disasm. 2023-08-13 10:37:21 -07:00
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8c036a889d riscv: Add debug log of block disasm. 2023-08-13 10:32:04 -07:00
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e51eca9eee UI: Fix frame profiler. 2023-08-13 10:21:08 -07:00
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41cddce167 TexCache: Encourage vectorization. 
This gets clang to vectorize on RISC-V V, although it looks suboptimal
(probably faster than not using vector, though.)  Also improves other
platforms, but our specializations seem better.
 2023-08-13 10:21:04 -07:00
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7cc6c5fa62 riscv: Fix load error w/o pointerify. 2023-08-13 10:20:28 -07:00
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be938a850b riscv: Remove FMul safety check. 
Let's just see if everything's right, this bloats multiplies a lot.
Doesn't seem to impact perf a lot, though.
 2023-08-13 10:20:20 -07:00
Unknown W. Brackets
fa53b80574 irjit: Cleanup/purge FPU/VFPU temps. 
A lot of cases are followed by an FMov that just moved the temp to a
regular register, from VFPU instructions playing safe about overlaps.
 2023-08-13 10:14:10 -07:00
Henrik Rydgård
e651d6e59f Finish the separation of EndFrame and Present. 2023-08-13 18:40:35 +02:00
Henrik Rydgård
377704f195 OpenGL: Split submit and presentation into two tasks, but schedule them together 2023-08-13 18:40:35 +02:00
Henrik Rydgård
86fcb28d4d Remove "bool retainControl_" for simplicity. Not needed. 2023-08-13 18:40:35 +02:00
Henrik Rydgård
f7b8075d05
Merge pull request #17896 from hrydgard/frame-timing-struct 
Frame timing struct
 2023-08-13 18:20:00 +02:00
Henrik Rydgård
a84cb357dc Comment fixes, adjust a couple of sleeps 2023-08-13 17:57:46 +02:00
Henrik Rydgård
7bb1914fd3 Add FrameTiming.cpp/h (with no real contents) 2023-08-13 17:57:43 +02:00
Henrik Rydgård
b84091f1d2
Merge pull request #17895 from hrydgard/ini-file-fix 
IniFile: Store sections in unique_ptrs, instead of directly.
 2023-08-13 14:01:34 +02:00
Henrik Rydgård
cf83be8b3c Very small memory leak fix 2023-08-13 13:55:51 +02:00
Henrik Rydgård
d82ecf1d3e IniFile: Store sections in unique_ptrs, instead of directly. 
This fixes an issue when you create two sections consecutively and
retain pointers to them, and then modify them, such as happens in the
postshader ini initialization. Previously, one of the section pointers
could get invalidated since the section vector got resized. Now, the
pointed-to sections don't move around in memory, only the list of them
does.
 2023-08-13 13:41:43 +02:00
Henrik Rydgård
2a74a0b98a
Merge pull request #17893 from unknownbrackets/riscv-blocklink 
riscv: Enable block linking
 2023-08-13 12:40:39 +02:00
Ethan O'Brien
8426b35a80 Cleanup emscripten libretro build target 2023-08-12 14:38:35 -05:00
Unknown W. Brackets
81f67c717c riscv: Fix block link for prev blocks. 
Oops, was just reversed so never linking.
 2023-08-12 10:48:39 -07:00
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71fcc4a658 riscv: Fix disassembly of ra-relative jump. 2023-08-12 09:53:38 -07:00
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8f155dba32 Debugger: Fix random FPU/VFPU selection. 2023-08-12 09:50:46 -07:00
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fcc90095f7 riscv: Enable block linking. 2023-08-12 09:37:02 -07:00
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247788806a irjit: Add direct helper for start PC. 
It's annoying always fetching length too.
 2023-08-12 09:37:02 -07:00