mirror of
https://github.com/hrydgard/ppsspp.git
synced 2024-11-23 21:39:52 +00:00
284 lines
7.0 KiB
C++
284 lines
7.0 KiB
C++
// Copyright (C) 2003 Dolphin Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official SVN repository and contact information can be found at
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// http://code.google.com/p/dolphin-emu/
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#include "ppsspp_config.h"
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#if PPSSPP_ARCH(RISCV64)
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#include "ext/cpu_features/include/cpuinfo_riscv.h"
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#if defined(CPU_FEATURES_OS_LINUX)
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#define USE_CPU_FEATURES 1
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#endif
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#include <cstring>
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#include <set>
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#include <sstream>
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#include <sys/auxv.h>
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#include <vector>
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#include "Common/Common.h"
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#include "Common/CPUDetect.h"
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#include "Common/StringUtils.h"
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#include "Common/File/FileUtil.h"
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#include "Common/Data/Encoding/Utf8.h"
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// Only Linux platforms have /proc/cpuinfo
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#if defined(__linux__)
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const char procfile[] = "/proc/cpuinfo";
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// https://www.kernel.org/doc/Documentation/ABI/testing/sysfs-devices-system-cpu
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const char syscpupresentfile[] = "/sys/devices/system/cpu/present";
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const char firmwarefile[] = "/sys/firmware/devicetree/base/compatible";
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class RiscVCPUInfoParser {
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public:
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RiscVCPUInfoParser();
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int ProcessorCount();
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int TotalLogicalCount();
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std::string ISAString();
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bool FirmwareMatchesCompatible(const std::string &str);
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private:
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std::vector<std::vector<std::string>> cores_;
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std::vector<std::string> firmware_;
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bool firmwareLoaded_ = false;
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};
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RiscVCPUInfoParser::RiscVCPUInfoParser() {
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std::string procdata, line;
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if (!File::ReadFileToString(true, Path(procfile), procdata))
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return;
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std::istringstream file(procdata);
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int index = -1;
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while (std::getline(file, line)) {
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if (line.length() == 0) {
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index = -1;
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} else {
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if (index == -1) {
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index = (int)cores_.size();
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cores_.push_back(std::vector<std::string>());
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}
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cores_[index].push_back(line);
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}
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}
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}
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int RiscVCPUInfoParser::ProcessorCount() {
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// Not using present as that counts the logical CPUs (aka harts.)
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static const char * const marker = "processor\t: ";
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std::set<std::string> processors;
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for (auto core : cores_) {
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for (auto line : core) {
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if (line.find(marker) != line.npos)
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processors.insert(line);
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}
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}
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return (int)processors.size();
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}
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int RiscVCPUInfoParser::TotalLogicalCount() {
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std::string presentData, line;
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bool presentSuccess = File::ReadFileToString(true, Path(syscpupresentfile), presentData);
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if (presentSuccess) {
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std::istringstream presentFile(presentData);
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int low, high, found;
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std::getline(presentFile, line);
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found = sscanf(line.c_str(), "%d-%d", &low, &high);
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if (found == 1)
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return 1;
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if (found == 2)
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return high - low + 1;
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}
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static const char * const marker = "hart\t\t: ";
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std::set<std::string> harts;
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for (auto core : cores_) {
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for (auto line : core) {
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if (line.find(marker) != line.npos)
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harts.insert(line);
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}
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}
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return (int)harts.size();
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}
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std::string RiscVCPUInfoParser::ISAString() {
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static const char * const marker = "isa\t\t: ";
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for (auto core : cores_) {
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for (auto line : core) {
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if (line.find(marker) != line.npos)
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return line.substr(strlen(marker));
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}
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}
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return "Unknown";
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}
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bool RiscVCPUInfoParser::FirmwareMatchesCompatible(const std::string &str) {
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if (!firmwareLoaded_) {
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firmwareLoaded_ = true;
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std::string data;
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if (!File::ReadFileToString(true, Path(firmwarefile), data))
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return false;
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SplitString(data, '\0', firmware_);
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}
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for (auto compatible : firmware_) {
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if (compatible == str)
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return true;
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}
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return false;
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}
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#endif
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static bool ExtensionSupported(unsigned long v, char c) {
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unsigned long bit = (v >> (c - 'A')) & 1;
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return bit == 1;
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}
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CPUInfo cpu_info;
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CPUInfo::CPUInfo() {
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Detect();
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}
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// Detects the various cpu features
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void CPUInfo::Detect()
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{
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// Set some defaults here
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HTT = false;
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#if PPSSPP_ARCH(RISCV64)
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OS64bit = true;
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CPU64bit = true;
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Mode64bit = true;
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#else
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OS64bit = false;
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CPU64bit = false;
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Mode64bit = false;
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#endif
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vendor = VENDOR_OTHER;
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// Not sure how to get anything great here.
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truncate_cpy(brand_string, "Unknown");
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#if !defined(__linux__)
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num_cores = 1;
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logical_cpu_count = 1;
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truncate_cpy(cpu_string, "Unknown");
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#else // __linux__
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RiscVCPUInfoParser parser;
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num_cores = parser.ProcessorCount();
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logical_cpu_count = parser.TotalLogicalCount() / num_cores;
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if (logical_cpu_count <= 0)
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logical_cpu_count = 1;
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truncate_cpy(cpu_string, parser.ISAString().c_str());
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// A number of CPUs support a limited set of bitmanip. It's not all U74, so we use SOC for now...
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if (parser.FirmwareMatchesCompatible("starfive,jh7110")) {
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RiscV_Zba = true;
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RiscV_Zbb = true;
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}
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#endif
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unsigned long hwcap = getauxval(AT_HWCAP);
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RiscV_M = ExtensionSupported(hwcap, 'M');
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RiscV_A = ExtensionSupported(hwcap, 'A');
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RiscV_F = ExtensionSupported(hwcap, 'F');
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RiscV_D = ExtensionSupported(hwcap, 'D');
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RiscV_C = ExtensionSupported(hwcap, 'C');
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RiscV_V = ExtensionSupported(hwcap, 'V');
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// We assume as in RVA20U64 that F means Zicsr is available.
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RiscV_Zicsr = RiscV_F;
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#ifdef USE_CPU_FEATURES
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cpu_features::RiscvInfo info = cpu_features::GetRiscvInfo();
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CPU64bit = info.features.RV64I;
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RiscV_M = info.features.M;
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RiscV_A = info.features.A;
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RiscV_F = info.features.F;
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RiscV_D = info.features.D;
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RiscV_C = info.features.C;
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RiscV_V = info.features.V;
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// Seems to be wrong sometimes, assume we have it if we have F.
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RiscV_Zicsr = info.features.Zicsr || info.features.F;
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truncate_cpy(brand_string, info.uarch);
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#endif
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}
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std::vector<std::string> CPUInfo::Features() {
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std::vector<std::string> features;
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struct Flag {
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bool &flag;
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const char *str;
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};
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const Flag list[] = {
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{ RiscV_M, "Muldiv" },
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{ RiscV_A, "Atomic" },
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{ RiscV_F, "Float" },
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{ RiscV_D, "Double" },
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{ RiscV_C, "Compressed" },
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{ RiscV_V, "Vector" },
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{ RiscV_Zvbb, "Vector Basic Bitmanip" },
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{ RiscV_Zvkb, "Vector Crypto Bitmanip" },
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{ RiscV_Zba, "Bitmanip Zba" },
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{ RiscV_Zbb, "Bitmanip Zbb" },
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{ RiscV_Zbc, "Bitmanip Zbc" },
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{ RiscV_Zbs, "Bitmanip Zbs" },
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{ RiscV_Zcb, "Compress Zcb" },
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{ RiscV_Zfa, "Float Additional" },
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{ RiscV_Zfh, "Float Half" },
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{ RiscV_Zfhmin, "Float Half Minimal" },
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{ RiscV_Zicond, "Integer Conditional" },
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{ RiscV_Zicsr, "Zicsr" },
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{ CPU64bit, "64-bit" },
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};
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for (auto &item : list) {
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if (item.flag) {
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features.push_back(item.str);
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}
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}
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return features;
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}
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// Turn the cpu info into a string we can show
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std::string CPUInfo::Summarize() {
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std::string sum;
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if (num_cores == 1)
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sum = StringFromFormat("%s, %i core", cpu_string, num_cores);
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else
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sum = StringFromFormat("%s, %i cores", cpu_string, num_cores);
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auto features = Features();
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for (std::string &feature : features) {
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sum += ", " + feature;
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}
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return sum;
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}
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#endif // PPSSPP_ARCH(RISCV64)
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