mirror of
https://github.com/hrydgard/ppsspp.git
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209 lines
4.3 KiB
C++
209 lines
4.3 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#pragma once
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#include "Globals.h"
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#include "Core/MemMap.h"
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#include "Core/CPU.h"
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#include "util/random/rng.h"
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typedef Memory::Opcode MIPSOpcode;
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enum MIPSGPReg
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{
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MIPS_REG_ZERO=0,
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MIPS_REG_COMPILER_SCRATCH=1,
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MIPS_REG_V0=2,
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MIPS_REG_V1=3,
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MIPS_REG_A0=4,
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MIPS_REG_A1=5,
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MIPS_REG_A2=6,
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MIPS_REG_A3=7,
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MIPS_REG_A4=8, // Seems to be N32 register calling convention - there are 8 args instead of 4.
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MIPS_REG_A5=9,
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MIPS_REG_T4=12,
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MIPS_REG_T5=13,
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MIPS_REG_T6=14,
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MIPS_REG_T7=15,
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MIPS_REG_S0=16,
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MIPS_REG_S1=17,
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MIPS_REG_S2=18,
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MIPS_REG_S3=19,
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MIPS_REG_S4=20,
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MIPS_REG_S5=21,
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MIPS_REG_S6=22,
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MIPS_REG_S7=23,
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MIPS_REG_T8=24,
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MIPS_REG_T9=25,
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MIPS_REG_K0=26,
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MIPS_REG_K1=27,
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MIPS_REG_GP=28,
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MIPS_REG_SP=29,
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MIPS_REG_FP=30,
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MIPS_REG_RA=31,
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// ID for mipscall "callback" is stored here - from JPCSP
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MIPS_REG_CALL_ID=MIPS_REG_S0,
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MIPS_REG_INVALID=-1,
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// Not real regs, just for convenience/jit mapping.
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MIPS_REG_HI = 32,
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MIPS_REG_LO = 33,
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MIPS_REG_FPCOND = 34,
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MIPS_REG_VFPUCC = 35,
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};
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enum
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{
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VFPU_CTRL_SPREFIX,
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VFPU_CTRL_TPREFIX,
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VFPU_CTRL_DPREFIX,
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VFPU_CTRL_CC,
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VFPU_CTRL_INF4,
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VFPU_CTRL_RSV5,
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VFPU_CTRL_RSV6,
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VFPU_CTRL_REV,
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VFPU_CTRL_RCX0,
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VFPU_CTRL_RCX1,
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VFPU_CTRL_RCX2,
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VFPU_CTRL_RCX3,
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VFPU_CTRL_RCX4,
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VFPU_CTRL_RCX5,
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VFPU_CTRL_RCX6,
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VFPU_CTRL_RCX7,
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VFPU_CTRL_MAX,
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//unknown....
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};
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enum VCondition
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{
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VC_FL,
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VC_EQ,
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VC_LT,
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VC_LE,
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VC_TR,
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VC_NE,
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VC_GE,
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VC_GT,
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VC_EZ,
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VC_EN,
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VC_EI,
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VC_ES,
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VC_NZ,
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VC_NN,
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VC_NI,
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VC_NS
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};
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// In memory, we order the VFPU registers differently.
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// Games use columns a whole lot more than rows, and it would thus be good if columns
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// were contiguous in memory. Also, matrices aren't but should be.
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extern u8 voffset[128];
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extern u8 fromvoffset[128];
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class MIPSState
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{
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public:
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MIPSState();
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~MIPSState();
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void Reset();
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void DoState(PointerWrap &p);
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// MUST start with r and be followed by f!
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u32 r[32];
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union {
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float f[32];
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u32 fi[32];
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int fs[32];
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};
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union {
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float v[128];
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u32 vi[128];
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};
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// Temps don't get flushed so we don't reserve space for them.
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// If vfpuCtrl (prefixes) get mysterious values, check the VFPU regcache code.
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u32 vfpuCtrl[16];
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union {
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struct {
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u32 pc;
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u32 hi;
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u32 lo;
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u32 fcr31; //fpu control register
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u32 fpcond; // cache the cond flag of fcr31 (& 1 << 23)
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};
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u32 other[6];
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};
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u32 nextPC;
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int downcount; // This really doesn't belong here, it belongs in CoreTiming. But you gotta do what you gotta do, this needs to be reachable in the ARM JIT.
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bool inDelaySlot;
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int llBit; // ll/sc
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u32 temp; // can be used to save temporaries during calculations when we need more than R0 and R1
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GMRng rng; // VFPU hardware random number generator. Probably not the right type.
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// Debug stuff
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u32 debugCount; // can be used to count basic blocks before crashes, etc.
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static const u32 FCR0_VALUE = 0x00003351;
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void WriteFCR(int reg, int value);
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u32 ReadFCR(int reg);
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u8 VfpuWriteMask() const {
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return (vfpuCtrl[VFPU_CTRL_DPREFIX] >> 8) & 0xF;
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}
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bool VfpuWriteMask(int i) const {
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return (vfpuCtrl[VFPU_CTRL_DPREFIX] >> (8 + i)) & 1;
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}
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void Irq();
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void SWI();
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void Abort();
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void SingleStep();
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int RunLoopUntil(u64 globalTicks);
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// To clear jit caches, etc.
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void InvalidateICache(u32 address, int length = 4);
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// for logging messages only.
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const char *DisasmAt(u32 compilerPC);
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};
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class MIPSDebugInterface;
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//The one we are compiling or running currently
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extern MIPSState *currentMIPS;
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extern MIPSDebugInterface *currentDebugMIPS;
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extern MIPSState mipsr4k;
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int MIPS_SingleStep();
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extern const float cst_constants[32];
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