mirror of
https://github.com/hrydgard/ppsspp.git
synced 2024-12-19 19:36:38 +00:00
485 lines
16 KiB
C++
485 lines
16 KiB
C++
// Copyright (c) 2014- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include "ppsspp_config.h"
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#include <stdarg.h>
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#include <stddef.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "Common/Log.h"
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#include "Common/MemoryUtil.h"
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#include "Common/MipsEmitter.h"
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#include "Common/CPUDetect.h"
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namespace MIPSGen {
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void MIPSEmitter::SetCodePointer(const u8 *ptr, u8 *writePtr) {
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code_ = writePtr;
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lastCacheFlushEnd_ = writePtr;
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}
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const u8 *MIPSEmitter::GetCodePointer() const {
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return code_;
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}
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void MIPSEmitter::ReserveCodeSpace(u32 bytes) {
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for (u32 i = 0; i < bytes / 4; ++i) {
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BREAK(0);
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}
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}
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const u8 *MIPSEmitter::AlignCode16() {
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ReserveCodeSpace((-(intptr_t)code_) & 15);
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return code_;
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}
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const u8 *MIPSEmitter::AlignCodePage() {
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// TODO: Assuming code pages ought to be 4K?
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ReserveCodeSpace((-(intptr_t)code_) & 4095);
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return code_;
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}
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const u8 *MIPSEmitter::GetCodePtr() const {
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return code_;
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}
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u8 *MIPSEmitter::GetWritableCodePtr() {
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return code_;
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}
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void MIPSEmitter::FlushIcache() {
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FlushIcacheSection(lastCacheFlushEnd_, code_);
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lastCacheFlushEnd_ = code_;
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}
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void MIPSEmitter::FlushIcacheSection(u8 *start, u8 *end) {
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#if PPSSPP_ARCH(MIPS)
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#ifdef __clang__
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__clear_cache(start, end);
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#else
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__builtin___clear_cache(start, end);
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#endif
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#endif
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}
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void MIPSEmitter::BREAK(u32 code) {
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// 000000 iiiiiiiiiiiiiiiiiiii 001101
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_dbg_assert_msg_(code <= 0xfffff, "Bad emitter arguments");
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Write32Fields(26, 0x00, 6, code & 0xfffff, 0, 0x0d);
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}
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FixupBranch MIPSEmitter::J(std::function<void ()> delaySlot) {
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// 000010 iiiiiiiiiiiiiiiiiiiiiiiiii (fix up)
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FixupBranch b = MakeFixupBranch(BRANCH_26);
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Write32Fields(26, 0x02);
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ApplyDelaySlot(delaySlot);
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return b;
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}
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void MIPSEmitter::J(const void *func, std::function<void ()> delaySlot) {
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SetJumpTarget(J(delaySlot), func);
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}
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FixupBranch MIPSEmitter::JAL(std::function<void ()> delaySlot) {
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// 000011 iiiiiiiiiiiiiiiiiiiiiiiiii (fix up)
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FixupBranch b = MakeFixupBranch(BRANCH_26);
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Write32Fields(26, 0x03);
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ApplyDelaySlot(delaySlot);
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return b;
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}
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void MIPSEmitter::JAL(const void *func, std::function<void ()> delaySlot) {
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SetJumpTarget(JAL(delaySlot), func);
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}
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void MIPSEmitter::JR(MIPSReg rs, std::function<void ()> delaySlot) {
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// 000000 sssss xxxxxxxxxx hint- 001000 (hint must be 0.)
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_dbg_assert_msg_(rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 0, 0x08);
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ApplyDelaySlot(delaySlot);
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}
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void MIPSEmitter::JALR(MIPSReg rd, MIPSReg rs, std::function<void ()> delaySlot) {
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// 000000 sssss xxxxx ddddd hint- 001001 (hint must be 0.)
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_dbg_assert_msg_(rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 11, rd, 0, 0x09);
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ApplyDelaySlot(delaySlot);
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}
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FixupBranch MIPSEmitter::BLTZ(MIPSReg rs, std::function<void ()> delaySlot) {
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// 000001 sssss xxxxx iiiiiiiiiiiiiii (fix up)
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_dbg_assert_msg_(rs < F_BASE, "Bad emitter arguments");
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FixupBranch b = MakeFixupBranch(BRANCH_16);
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Write32Fields(26, 0x01, 21, rs);
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ApplyDelaySlot(delaySlot);
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return b;
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}
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void MIPSEmitter::BLTZ(MIPSReg rs, const void *func, std::function<void ()> delaySlot) {
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SetJumpTarget(BLTZ(rs, delaySlot), func);
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}
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FixupBranch MIPSEmitter::BEQ(MIPSReg rs, MIPSReg rt, std::function<void ()> delaySlot) {
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// 000100 sssss ttttt iiiiiiiiiiiiiii (fix up)
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_dbg_assert_msg_(rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
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FixupBranch b = MakeFixupBranch(BRANCH_16);
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Write32Fields(26, 0x04, 21, rs, 16, rt);
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ApplyDelaySlot(delaySlot);
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return b;
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}
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void MIPSEmitter::BEQ(MIPSReg rs, MIPSReg rt, const void *func, std::function<void ()> delaySlot) {
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SetJumpTarget(BEQ(rs, rt, delaySlot), func);
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}
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FixupBranch MIPSEmitter::BNE(MIPSReg rs, MIPSReg rt, std::function<void ()> delaySlot) {
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// 000101 sssss ttttt iiiiiiiiiiiiiii (fix up)
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_dbg_assert_msg_(rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
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FixupBranch b = MakeFixupBranch(BRANCH_16);
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Write32Fields(26, 0x05, 21, rs, 16, rt);
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ApplyDelaySlot(delaySlot);
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return b;
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}
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void MIPSEmitter::BNE(MIPSReg rs, MIPSReg rt, const void *func, std::function<void ()> delaySlot) {
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SetJumpTarget(BNE(rs, rt, delaySlot), func);
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}
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FixupBranch MIPSEmitter::BLEZ(MIPSReg rs, std::function<void ()> delaySlot) {
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// 000110 sssss xxxxx iiiiiiiiiiiiiii (fix up)
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_dbg_assert_msg_(rs < F_BASE, "Bad emitter arguments");
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FixupBranch b = MakeFixupBranch(BRANCH_16);
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Write32Fields(26, 0x06, 21, rs);
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ApplyDelaySlot(delaySlot);
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return b;
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}
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void MIPSEmitter::BLEZ(MIPSReg rs, const void *func, std::function<void ()> delaySlot) {
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SetJumpTarget(BLEZ(rs, delaySlot), func);
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}
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FixupBranch MIPSEmitter::BGTZ(MIPSReg rs, std::function<void ()> delaySlot) {
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// 000111 sssss xxxxx iiiiiiiiiiiiiii (fix up)
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_dbg_assert_msg_(rs < F_BASE, "Bad emitter arguments");
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FixupBranch b = MakeFixupBranch(BRANCH_16);
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Write32Fields(26, 0x07, 21, rs);
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ApplyDelaySlot(delaySlot);
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return b;
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}
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void MIPSEmitter::BGTZ(MIPSReg rs, const void *func, std::function<void ()> delaySlot) {
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SetJumpTarget(BGTZ(rs, delaySlot), func);
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}
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void MIPSEmitter::SetJumpTarget(const FixupBranch &branch) {
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SetJumpTarget(branch, code_);
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}
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bool MIPSEmitter::BInRange(const void *func) {
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return BInRange(code_, func);
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}
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bool MIPSEmitter::JInRange(const void *func) {
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return JInRange(code_, func);
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}
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void MIPSEmitter::SetJumpTarget(const FixupBranch &branch, const void *dst) {
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const intptr_t srcp = (intptr_t)branch.ptr;
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const intptr_t dstp = (intptr_t)dst;
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u32 *fixup = (u32 *)branch.ptr;
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_dbg_assert_msg_((dstp & 3) == 0, "Destination should be aligned");
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if (branch.type == BRANCH_16) {
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// The distance is encoded as words from the delay slot.
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ptrdiff_t distance = (dstp - srcp - 4) >> 2;
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_dbg_assert_msg_(BInRange(branch.ptr, dst), "Destination is too far away (%p -> %p)", branch.ptr, dst);
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*fixup = (*fixup & 0xffff0000) | (distance & 0x0000ffff);
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} else {
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// Absolute, easy.
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_dbg_assert_msg_(JInRange(branch.ptr, dst), "Destination is too far away (%p -> %p)", branch.ptr, dst);
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*fixup = (*fixup & 0xfc000000) | ((dstp >> 2) & 0x03ffffff);
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}
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}
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bool MIPSEmitter::BInRange(const void *src, const void *dst) {
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const intptr_t srcp = (intptr_t)src;
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const intptr_t dstp = (intptr_t)dst;
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// The distance is encoded as words from the delay slot.
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ptrdiff_t distance = (dstp - srcp - 4) >> 2;
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return distance >= -0x8000 && distance < 0x8000;
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}
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bool MIPSEmitter::JInRange(const void *src, const void *dst) {
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const intptr_t srcp = (intptr_t)src;
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const intptr_t dstp = (intptr_t)dst;
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return (srcp - (srcp & 0x0fffffff)) == (dstp - (dstp & 0x0fffffff));
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}
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void MIPSEmitter::ApplyDelaySlot(std::function<void ()> delaySlot) {
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if (delaySlot) {
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delaySlot();
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} else {
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// We just insert a NOP if there's no delay slot provided. Safer.
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NOP();
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}
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}
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void MIPSEmitter::QuickCallFunction(MIPSReg scratchreg, const void *func) {
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_dbg_assert_msg_(scratchreg < F_BASE, "Bad emitter arguments");
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if (JInRange(func)) {
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JAL(func);
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} else {
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// This may never happen.
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MOVP2R(scratchreg, func);
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JALR(scratchreg);
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}
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}
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FixupBranch MIPSEmitter::MakeFixupBranch(FixupBranchType type) {
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FixupBranch b;
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b.ptr = code_;
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b.type = type;
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return b;
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}
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void MIPSEmitter::LB(MIPSReg value, MIPSReg base, s16 offset) {
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// 100000 sssss ttttt iiiiiiiiiiiiiiii - rs = base, rt = value
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_dbg_assert_msg_(value < F_BASE && base < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x20, 21, base, 16, value, 0, (u16)offset);
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}
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void MIPSEmitter::LH(MIPSReg value, MIPSReg base, s16 offset) {
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// 100001 sssss ttttt iiiiiiiiiiiiiiii - rs = base, rt = value
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_dbg_assert_msg_(value < F_BASE && base < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x21, 21, base, 16, value, 0, (u16)offset);
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}
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void MIPSEmitter::LW(MIPSReg value, MIPSReg base, s16 offset) {
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// 100011 sssss ttttt iiiiiiiiiiiiiiii - rs = base, rt = value
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_dbg_assert_msg_(value < F_BASE && base < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x23, 21, base, 16, value, 0, (u16)offset);
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}
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void MIPSEmitter::SB(MIPSReg value, MIPSReg base, s16 offset) {
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// 101000 sssss ttttt iiiiiiiiiiiiiiii - rs = base, rt = value
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_dbg_assert_msg_(value < F_BASE && base < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x28, 21, base, 16, value, 0, (u16)offset);
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}
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void MIPSEmitter::SH(MIPSReg value, MIPSReg base, s16 offset) {
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// 101001 sssss ttttt iiiiiiiiiiiiiiii - rs = base, rt = value
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_dbg_assert_msg_(value < F_BASE && base < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x29, 21, base, 16, value, 0, (u16)offset);
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}
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void MIPSEmitter::SW(MIPSReg value, MIPSReg base, s16 offset) {
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// 101011 sssss ttttt iiiiiiiiiiiiiiii - rs = base, rt = value
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_dbg_assert_msg_(value < F_BASE && base < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x2b, 21, base, 16, value, 0, (u16)offset);
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}
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void MIPSEmitter::SLL(MIPSReg rd, MIPSReg rt, u8 sa) {
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// 000000 xxxxx ttttt ddddd aaaaa 000000
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_dbg_assert_msg_(rd < F_BASE && rt < F_BASE && sa <= 0x1f, "Bad emitter arguments");
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Write32Fields(26, 0x00, 16, rt, 11, rd, 6, sa & 0x1f, 0, 0x00);
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}
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void MIPSEmitter::SRL(MIPSReg rd, MIPSReg rt, u8 sa) {
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// 000000 xxxxx ttttt ddddd aaaaa 000010
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_dbg_assert_msg_(rd < F_BASE && rt < F_BASE && sa <= 0x1f, "Bad emitter arguments");
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Write32Fields(26, 0x00, 16, rt, 11, rd, 6, sa & 0x1f, 0, 0x02);
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}
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void MIPSEmitter::SRA(MIPSReg rd, MIPSReg rt, u8 sa) {
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// 000000 xxxxx ttttt ddddd aaaaa 000011
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_dbg_assert_msg_(rd < F_BASE && rt < F_BASE && sa <= 0x1f, "Bad emitter arguments");
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Write32Fields(26, 0x00, 16, rt, 11, rd, 6, sa & 0x1f, 0, 0x03);
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}
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void MIPSEmitter::SLLV(MIPSReg rd, MIPSReg rt, MIPSReg rs) {
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// 000000 sssss ttttt ddddd xxxxx 000100
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_dbg_assert_msg_(rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x04);
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}
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void MIPSEmitter::SRLV(MIPSReg rd, MIPSReg rt, MIPSReg rs) {
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// 000000 sssss ttttt ddddd xxxxx 000110
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_dbg_assert_msg_(rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x06);
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}
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void MIPSEmitter::SRAV(MIPSReg rd, MIPSReg rt, MIPSReg rs) {
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// 000000 sssss ttttt ddddd xxxxx 000111
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_dbg_assert_msg_(rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x07);
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}
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void MIPSEmitter::SLT(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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// 000000 sssss ttttt ddddd xxxxx 101010
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_dbg_assert_msg_(rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x2a);
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}
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void MIPSEmitter::SLTU(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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// 000000 sssss ttttt ddddd xxxxx 101011
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_dbg_assert_msg_(rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x2b);
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}
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void MIPSEmitter::SLTI(MIPSReg rt, MIPSReg rs, s16 imm) {
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// 001010 sssss ttttt iiiiiiiiiiiiiiii
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_dbg_assert_msg_(rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x0a, 21, rs, 16, rt, 0, (u16)imm);
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}
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void MIPSEmitter::SLTIU(MIPSReg rt, MIPSReg rs, s16 imm) {
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// 001011 sssss ttttt iiiiiiiiiiiiiiii
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_dbg_assert_msg_(rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x0b, 21, rs, 16, rt, 0, (u16)imm);
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}
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void MIPSEmitter::ADDU(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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// 000000 sssss ttttt ddddd 00000100001
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_dbg_assert_msg_(rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x21);
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}
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void MIPSEmitter::SUBU(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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// 000000 sssss ttttt ddddd 00000100011
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_dbg_assert_msg_(rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x23);
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}
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void MIPSEmitter::ADDIU(MIPSReg rt, MIPSReg rs, s16 imm) {
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// 001001 sssss ttttt iiiiiiiiiiiiiiii
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_dbg_assert_msg_(rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x09, 21, rs, 16, rt, 0, (u16)imm);
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}
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void MIPSEmitter::AND(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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// 000000 sssss ttttt ddddd 00000100100
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_dbg_assert_msg_(rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x24);
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}
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void MIPSEmitter::OR(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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// 000000 sssss ttttt ddddd 00000100101
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_dbg_assert_msg_(rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x25);
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}
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void MIPSEmitter::XOR(MIPSReg rd, MIPSReg rs, MIPSReg rt) {
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// 000000 sssss ttttt ddddd 00000100110
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_dbg_assert_msg_(rd < F_BASE && rt < F_BASE && rs < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x00, 21, rs, 16, rt, 11, rd, 0, 0x26);
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}
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void MIPSEmitter::ANDI(MIPSReg rt, MIPSReg rs, s16 imm) {
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// 001100 sssss ttttt iiiiiiiiiiiiiiii
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_dbg_assert_msg_(rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x0c, 21, rs, 16, rt, 0, (u16)imm);
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}
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void MIPSEmitter::ORI(MIPSReg rt, MIPSReg rs, s16 imm) {
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// 001101 sssss ttttt iiiiiiiiiiiiiiii
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_dbg_assert_msg_(rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x0d, 21, rs, 16, rt, 0, (u16)imm);
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}
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void MIPSEmitter::XORI(MIPSReg rt, MIPSReg rs, s16 imm) {
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// 001110 sssss ttttt iiiiiiiiiiiiiiii
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_dbg_assert_msg_(rs < F_BASE && rt < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x0e, 21, rs, 16, rt, 0, (u16)imm);
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}
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void MIPSEmitter::LUI(MIPSReg rt, s16 imm) {
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// 001111 00000 ttttt iiiiiiiiiiiiiiii
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_dbg_assert_msg_(rt < F_BASE, "Bad emitter arguments");
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Write32Fields(26, 0x0f, 16, rt, 0, (u16)imm);
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}
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void MIPSEmitter::INS(MIPSReg rt, MIPSReg rs, s8 pos, s8 size) {
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// 011111 sssss ttttt xxxxx yyyyy 000100
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_dbg_assert_msg_(rt < F_BASE && rs < F_BASE && pos <= 0x1f && (size+pos+1) <= 0x1f, "Bad emitter arguments");
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Write32Fields(26, 0x1f, 21, rt, 16, rs, 11, (size+pos+1) & 0x1f, 6, pos & 0x1f, 0, 0x04);
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}
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void MIPSEmitter::EXT(MIPSReg rt, MIPSReg rs, s8 pos, s8 size) {
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// 111111 sssss ttttt xxxxx yyyyy 000000
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_dbg_assert_msg_(rt < F_BASE && rs < F_BASE && pos <= 0x1f && size >= 1, "Bad emitter arguments");
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Write32Fields(26, 0x3f, 21, rt, 16, rs, 11, (size-1) & 0x1f, 6, pos & 0x1f, 0, 0x00);
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}
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void MIPSEmitter::DSLL(MIPSReg rd, MIPSReg rt, u8 sa) {
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// 000000 xxxxx ttttt ddddd aaaaa 111000 DSLL
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// 000000 xxxxx ttttt ddddd aaaaa 111100 DSLL32
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_dbg_assert_msg_(rd < F_BASE && rt < F_BASE && sa <= 0x3f, "Bad emitter arguments");
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// TODO: Assert MIPS64.
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if (sa >= 32) {
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Write32Fields(26, 0x00, 16, rt, 11, rd, 6, (sa - 32) & 0x1f, 0, 0x3c);
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} else {
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Write32Fields(26, 0x00, 16, rt, 11, rd, 6, sa & 0x1f, 0, 0x38);
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}
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}
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void MIPSEmitter::MOVI2R(MIPSReg reg, u64 imm) {
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_dbg_assert_msg_(reg < F_BASE, "Bad emitter arguments");
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// TODO: Assert MIPS64.
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// Probably better to use a literal pool and load.
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LUI(reg, imm >> 48);
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ORI(reg, reg, (imm >> 32) & 0x0000ffff);
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DSLL(reg, reg, 16);
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ORI(reg, reg, (imm >> 16) & 0x0000ffff);
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DSLL(reg, reg, 16);
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ORI(reg, reg, (imm >> 0) & 0x0000ffff);
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}
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void MIPSEmitter::MOVI2R(MIPSReg reg, u32 imm) {
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_dbg_assert_msg_(reg < F_BASE, "Bad emitter arguments");
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if ((imm & 0xffff0000) != 0) {
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#if 0
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// TODO: CPUDetect MIPS64. Ideally allow emitter to emit MIPS32 on x64.
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ORI(reg, R_ZERO, imm >> 16);
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DSLL(reg, reg, 16);
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ORI(reg, reg, imm & 0x0000ffff);
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#else
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LUI(reg, imm >> 16);
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ORI(reg, reg, imm & 0x0000ffff);
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#endif
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} else {
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ORI(reg, R_ZERO, imm & 0x0000ffff);
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}
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}
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void MIPSCodeBlock::PoisonMemory(int offset) {
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u32 *ptr = (u32 *)(region + offset);
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u32 *maxptr = (u32 *)(region + region_size - offset);
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// If our memory isn't a multiple of u32 then this won't write the last remaining bytes with anything
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// Less than optimal, but there would be nothing we could do but throw a runtime warning anyway.
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// AArch64: 0x0000000d = break 0
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while (ptr < maxptr)
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*ptr++ = 0x0000000d;
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}
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}
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