mirror of
https://github.com/hrydgard/ppsspp.git
synced 2024-11-23 21:39:52 +00:00
320 lines
7.0 KiB
C++
320 lines
7.0 KiB
C++
// Copyright (C) 2003 Dolphin Project / 2012 PPSSPP Project
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include "Common.h"
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#include "Atomic.h"
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#include "MemMap.h"
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#include "Config.h"
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#include "Host.h"
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#include "MIPS/MIPS.h"
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// TODO: Fix this
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#undef ENABLE_MEM_CHECK
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namespace Memory
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{
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// =================================
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// From Memmap.cpp
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// ----------------
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// Read and write shortcuts
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// GetPointer must always return an address in the bottom 32 bits of address space, so that 64-bit
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// programs don't have problems directly addressing any part of memory.
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u8 *GetPointer(const u32 address)
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{
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if ((address & 0x3E000000) == 0x08000000)
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{
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return m_pRAM + (address & RAM_MASK);
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}
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else if ((address & 0x3F800000) == 0x04000000)
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{
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return m_pVRAM + (address & VRAM_MASK);
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}
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else if ((address & 0xBFFF0000) == 0x00010000)
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{
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return m_pScratchPad + (address & SCRATCHPAD_MASK);
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}
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else
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{
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ERROR_LOG(MEMMAP, "Unknown GetPointer %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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if (!g_Config.bIgnoreBadMemAccess) {
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Core_EnableStepping(true);
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host->SetDebugMode(true);
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}
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return 0;
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}
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}
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template <typename T>
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inline void ReadFromHardware(T &var, const u32 address)
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{
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// TODO: Figure out the fastest order of tests for both read and write (they are probably different).
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// TODO: Make sure this represents the mirrors in a correct way.
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// Could just do a base-relative read, too.... TODO
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if ((address & 0x3E000000) == 0x08000000)
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{
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var = *((const T*)&m_pRAM[address & RAM_MASK]);
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}
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else if ((address & 0x3F800000) == 0x04000000)
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{
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var = *((const T*)&m_pVRAM[address & VRAM_MASK]);
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}
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else if ((address & 0xBFFF0000) == 0x00010000)
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{
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// Scratchpad
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var = *((const T*)&m_pScratchPad[address & SCRATCHPAD_MASK]);
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}
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else
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{
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if (g_Config.bJit) {
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WARN_LOG(MEMMAP, "ReadFromHardware: Invalid address %08x", address);
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} else {
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WARN_LOG(MEMMAP, "ReadFromHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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}
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if (!g_Config.bIgnoreBadMemAccess) {
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Core_EnableStepping(true);
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host->SetDebugMode(true);
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}
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var = 0;
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}
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}
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template <typename T>
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inline void WriteToHardware(u32 address, const T data)
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{
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// Could just do a base-relative write, too.... TODO
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if ((address & 0x3E000000) == 0x08000000)
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{
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*(T*)&m_pRAM[address & RAM_MASK] = data;
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}
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else if ((address & 0x3F800000) == 0x04000000)
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{
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*(T*)&m_pVRAM[address & VRAM_MASK] = data;
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}
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else if ((address & 0xBFFF0000) == 0x00010000)
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{
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*(T*)&m_pScratchPad[address & SCRATCHPAD_MASK] = data;
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}
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else
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{
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if (g_Config.bJit) {
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WARN_LOG(MEMMAP, "WriteToHardware: Invalid address %08x", address);
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} else {
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WARN_LOG(MEMMAP, "WriteToHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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}
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if (!g_Config.bIgnoreBadMemAccess) {
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Core_EnableStepping(true);
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host->SetDebugMode(true);
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}
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}
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}
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// =====================
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bool IsValidAddress(const u32 address)
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{
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if ((address & 0x3E000000) == 0x08000000)
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{
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return true;
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}
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else if ((address & 0x3F800000) == 0x04000000)
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{
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return true;
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}
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else if ((address & 0xBFFF0000) == 0x00010000)
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{
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return true;
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}
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else
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return false;
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}
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u8 Read_U8(const u32 _Address)
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{
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u8 _var = 0;
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ReadFromHardware<u8>(_var, _Address);
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#ifdef ENABLE_MEM_CHECK
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TMemCheck *mc = PowerPC::memchecks.GetMemCheck(_Address);
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if (mc)
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{
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mc->numHits++;
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mc->Action(&PowerPC::debug_interface, _var, _Address, false, 1, PC);
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}
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#endif
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return (u8)_var;
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}
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u16 Read_U16(const u32 _Address)
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{
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u16 _var = 0;
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ReadFromHardware<u16>(_var, _Address);
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#ifdef ENABLE_MEM_CHECK
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TMemCheck *mc = PowerPC::memchecks.GetMemCheck(_Address);
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if (mc)
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{
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mc->numHits++;
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mc->Action(&PowerPC::debug_interface, _var, _Address, false, 2, PC);
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}
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#endif
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return (u16)_var;
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}
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u32 Read_U32(const u32 _Address)
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{
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u32 _var = 0;
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ReadFromHardware<u32>(_var, _Address);
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#ifdef ENABLE_MEM_CHECK
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TMemCheck *mc = PowerPC::memchecks.GetMemCheck(_Address);
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if (mc)
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{
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mc->numHits++;
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mc->Action(&PowerPC::debug_interface, _var, _Address, false, 4, PC);
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}
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#endif
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return _var;
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}
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u64 Read_U64(const u32 _Address)
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{
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u64 _var = 0;
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ReadFromHardware<u64>(_var, _Address);
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#ifdef ENABLE_MEM_CHECK
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TMemCheck *mc = PowerPC::memchecks.GetMemCheck(_Address);
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if (mc)
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{
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mc->numHits++;
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mc->Action(&PowerPC::debug_interface, (u32)_var, _Address, false, 8, PC);
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}
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#endif
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return _var;
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}
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u32 Read_U8_ZX(const u32 _Address)
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{
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return (u32)Read_U8(_Address);
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}
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u32 Read_U16_ZX(const u32 _Address)
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{
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return (u32)Read_U16(_Address);
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}
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void Write_U8(const u8 _Data, const u32 _Address)
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{
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#ifdef ENABLE_MEM_CHECK
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TMemCheck *mc = PowerPC::memchecks.GetMemCheck(_Address);
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if (mc)
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{
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mc->numHits++;
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mc->Action(&PowerPC::debug_interface, _Data,_Address,true,1,PC);
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}
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#endif
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WriteToHardware<u8>(_Address, _Data);
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}
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void Write_U16(const u16 _Data, const u32 _Address)
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{
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#ifdef ENABLE_MEM_CHECK
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TMemCheck *mc = PowerPC::memchecks.GetMemCheck(_Address);
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if (mc)
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{
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mc->numHits++;
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mc->Action(&PowerPC::debug_interface, _Data,_Address,true,2,PC);
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}
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#endif
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WriteToHardware<u16>(_Address, _Data);
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}
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void Write_U32(const u32 _Data, const u32 _Address)
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{
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#ifdef ENABLE_MEM_CHECK
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TMemCheck *mc = PowerPC::memchecks.GetMemCheck(_Address);
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if (mc)
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{
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mc->numHits++;
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mc->Action(&PowerPC::debug_interface, _Data,_Address,true,4,PC);
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}
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#endif
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WriteToHardware<u32>(_Address, _Data);
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}
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void Write_U64(const u64 _Data, const u32 _Address)
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{
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#ifdef ENABLE_MEM_CHECK
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TMemCheck *mc = PowerPC::memchecks.GetMemCheck(_Address);
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if (mc)
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{
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mc->numHits++;
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mc->Action(&PowerPC::debug_interface, (u32)_Data,_Address,true,8,PC);
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}
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#endif
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WriteToHardware<u64>(_Address, _Data);
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}
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#ifdef SAFE_MEMORY
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u8 ReadUnchecked_U8(const u32 _Address)
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{
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u8 _var = 0;
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ReadFromHardware<u8>(_var, _Address);
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return _var;
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}
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u16 ReadUnchecked_U16(const u32 _Address)
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{
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u16 _var = 0;
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ReadFromHardware<u16>(_var, _Address);
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return _var;
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}
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u32 ReadUnchecked_U32(const u32 _Address)
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{
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u32 _var = 0;
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ReadFromHardware<u32>(_var, _Address);
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return _var;
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}
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void WriteUnchecked_U8(const u8 _iValue, const u32 _Address)
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{
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WriteToHardware<u8>(_Address, _iValue);
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}
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void WriteUnchecked_U16(const u16 _iValue, const u32 _Address)
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{
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WriteToHardware<u16>(_Address, _iValue);
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}
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void WriteUnchecked_U32(const u32 _iValue, const u32 _Address)
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{
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WriteToHardware<u32>(_Address, _iValue);
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}
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#endif
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} // namespace Memory
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