mirror of
https://github.com/hrydgard/ppsspp.git
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300 lines
8.8 KiB
C++
300 lines
8.8 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#pragma once
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#include <cstring>
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#include "Common/CPUDetect.h"
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#include "Core/MIPS/JitCommon/JitState.h"
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#include "Core/MIPS/JitCommon/JitBlockCache.h"
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#include "Core/MIPS/JitCommon/JitCommon.h"
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#include "Core/MIPS/IR/IRRegCache.h"
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#include "Core/MIPS/IR/IRInst.h"
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#include "Core/MIPS/MIPSVFPUUtils.h"
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#ifndef offsetof
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#include "stddef.h"
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#endif
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namespace MIPSComp {
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// TODO : Use arena allocators. For now let's just malloc.
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class IRBlock {
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public:
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IRBlock() : instr_(nullptr), const_(nullptr), numInstructions_(0), numConstants_(0), origAddr_(0) {}
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IRBlock(u32 emAddr) : instr_(nullptr), const_(nullptr), origAddr_(emAddr), numInstructions_(0) {}
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IRBlock(IRBlock &&b) {
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instr_ = b.instr_;
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const_ = b.const_;
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numInstructions_ = b.numInstructions_;
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numConstants_ = b.numConstants_;
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origAddr_ = b.origAddr_;
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origFirstOpcode_ = b.origFirstOpcode_;
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b.instr_ = nullptr;
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b.const_ = nullptr;
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}
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~IRBlock() {
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delete[] instr_;
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delete[] const_;
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}
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void SetInstructions(const std::vector<IRInst> &inst, const std::vector<u32> &constants) {
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instr_ = new IRInst[inst.size()];
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numInstructions_ = (u16)inst.size();
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memcpy(instr_, &inst[0], sizeof(IRInst) * inst.size());
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const_ = new u32[constants.size()];
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numConstants_ = (u16)constants.size();
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memcpy(const_, &constants[0], sizeof(u32) * constants.size());
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}
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const IRInst *GetInstructions() const { return instr_; }
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const u32 *GetConstants() const { return const_; }
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int GetNumInstructions() const { return numInstructions_; }
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MIPSOpcode GetOriginalFirstOp() const { return origFirstOpcode_; }
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void Finalize(int number);
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private:
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IRInst *instr_;
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u32 *const_;
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u16 numInstructions_;
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u16 numConstants_;
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u32 origAddr_;
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MIPSOpcode origFirstOpcode_;
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};
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class IRBlockCache {
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public:
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void Clear();
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void InvalidateICache(u32 addess, u32 length);
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int GetNumBlocks() const { return (int)blocks_.size(); }
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int AllocateBlock(int emAddr) {
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blocks_.push_back(IRBlock(emAddr));
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size_ = (int)blocks_.size();
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return (int)blocks_.size() - 1;
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}
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IRBlock *GetBlock(int i) {
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if (i >= 0 && i < size_) {
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return &blocks_[i];
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} else {
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return nullptr;
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}
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}
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private:
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int size_;
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std::vector<IRBlock> blocks_;
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};
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class IRJit : public JitInterface {
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public:
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IRJit(MIPSState *mips);
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virtual ~IRJit();
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void DoState(PointerWrap &p) override;
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void DoDummyState(PointerWrap &p) override;
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const JitOptions &GetJitOptions() { return jo; }
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// Compiled ops should ignore delay slots
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// the compiler will take care of them by itself
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// OR NOT
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void Comp_Generic(MIPSOpcode op) override;
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void RunLoopUntil(u64 globalticks) override;
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void Compile(u32 em_address) override; // Compiles a block at current MIPS PC
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void DoJit(u32 em_address, IRBlock *b);
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bool DescribeCodePtr(const u8 *ptr, std::string &name) override;
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void Comp_RunBlock(MIPSOpcode op) override;
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void Comp_ReplacementFunc(MIPSOpcode op) override;
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// Ops
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void Comp_ITypeMem(MIPSOpcode op) override;
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void Comp_Cache(MIPSOpcode op) override;
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void Comp_RelBranch(MIPSOpcode op) override;
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void Comp_RelBranchRI(MIPSOpcode op) override;
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void Comp_FPUBranch(MIPSOpcode op) override;
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void Comp_FPULS(MIPSOpcode op) override;
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void Comp_FPUComp(MIPSOpcode op) override;
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void Comp_Jump(MIPSOpcode op) override;
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void Comp_JumpReg(MIPSOpcode op) override;
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void Comp_Syscall(MIPSOpcode op) override;
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void Comp_Break(MIPSOpcode op) override;
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void Comp_IType(MIPSOpcode op) override;
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void Comp_RType2(MIPSOpcode op) override;
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void Comp_RType3(MIPSOpcode op) override;
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void Comp_ShiftType(MIPSOpcode op) override;
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void Comp_Allegrex(MIPSOpcode op) override;
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void Comp_Allegrex2(MIPSOpcode op) override;
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void Comp_VBranch(MIPSOpcode op) override;
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void Comp_MulDivType(MIPSOpcode op) override;
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void Comp_Special3(MIPSOpcode op) override;
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void Comp_FPU3op(MIPSOpcode op) override;
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void Comp_FPU2op(MIPSOpcode op) override;
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void Comp_mxc1(MIPSOpcode op) override;
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void Comp_DoNothing(MIPSOpcode op) override;
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void Comp_SV(MIPSOpcode op) override;
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void Comp_SVQ(MIPSOpcode op) override;
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void Comp_VPFX(MIPSOpcode op) override;
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void Comp_VVectorInit(MIPSOpcode op) override;
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void Comp_VMatrixInit(MIPSOpcode op) override;
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void Comp_VDot(MIPSOpcode op) override;
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void Comp_VecDo3(MIPSOpcode op) override;
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void Comp_VV2Op(MIPSOpcode op) override;
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void Comp_Mftv(MIPSOpcode op) override;
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void Comp_Vmfvc(MIPSOpcode op) override;
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void Comp_Vmtvc(MIPSOpcode op) override;
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void Comp_Vmmov(MIPSOpcode op) override;
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void Comp_VScl(MIPSOpcode op) override;
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void Comp_Vmmul(MIPSOpcode op) override;
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void Comp_Vmscl(MIPSOpcode op) override;
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void Comp_Vtfm(MIPSOpcode op) override;
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void Comp_VHdp(MIPSOpcode op) override;
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void Comp_VCrs(MIPSOpcode op) override;
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void Comp_VDet(MIPSOpcode op) override;
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void Comp_Vi2x(MIPSOpcode op) override;
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void Comp_Vx2i(MIPSOpcode op) override;
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void Comp_Vf2i(MIPSOpcode op) override;
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void Comp_Vi2f(MIPSOpcode op) override;
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void Comp_Vh2f(MIPSOpcode op) override;
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void Comp_Vcst(MIPSOpcode op) override;
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void Comp_Vhoriz(MIPSOpcode op) override;
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void Comp_VRot(MIPSOpcode op) override;
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void Comp_VIdt(MIPSOpcode op) override;
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void Comp_Vcmp(MIPSOpcode op) override;
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void Comp_Vcmov(MIPSOpcode op) override;
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void Comp_Viim(MIPSOpcode op) override;
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void Comp_Vfim(MIPSOpcode op) override;
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void Comp_VCrossQuat(MIPSOpcode op) override;
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void Comp_Vsgn(MIPSOpcode op) override;
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void Comp_Vocp(MIPSOpcode op) override;
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void Comp_ColorConv(MIPSOpcode op) override;
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void Comp_Vbfy(MIPSOpcode op) override;
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int Replace_fabsf();
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// Not using a regular block cache.
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JitBlockCache *GetBlockCache() override { return nullptr; }
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MIPSOpcode GetOriginalOp(MIPSOpcode op) override;
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void ClearCache();
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void InvalidateCache();
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void InvalidateCacheAt(u32 em_address, int length = 4);
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void EatPrefix() { js.EatPrefix(); }
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const u8 *GetDispatcher() const override {
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return dispatcher;
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}
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void LinkBlock(u8 *exitPoint, const u8 *checkedEntry) override;
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void UnlinkBlock(u8 *checkedEntry, u32 originalAddress) override;
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private:
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void FlushAll();
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void FlushPrefixV();
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u32 GetCompilerPC();
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void CompileDelaySlot();
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void EatInstruction(MIPSOpcode op);
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MIPSOpcode GetOffsetInstruction(int offset);
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void RestoreRoundingMode(bool force = false);
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void ApplyRoundingMode(bool force = false);
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void UpdateRoundingMode();
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bool ReplaceJalTo(u32 dest);
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// Utility compilation functions
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void BranchFPFlag(MIPSOpcode op, IRComparison cc, bool likely);
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void BranchVFPUFlag(MIPSOpcode op, IRComparison cc, bool likely);
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void BranchRSZeroComp(MIPSOpcode op, IRComparison cc, bool andLink, bool likely);
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void BranchRSRTComp(MIPSOpcode op, IRComparison cc, bool likely);
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// Utilities to reduce duplicated code
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void CompShiftImm(MIPSOpcode op, IROp shiftType, int sa);
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void CompShiftVar(MIPSOpcode op, IROp shiftType, IROp shiftTypeConst);
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void ApplyPrefixST(u8 *vregs, u32 prefix, VectorSize sz);
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void ApplyPrefixD(const u8 *vregs, VectorSize sz);
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void GetVectorRegsPrefixS(u8 *regs, VectorSize sz, int vectorReg) {
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_assert_(js.prefixSFlag & JitState::PREFIX_KNOWN);
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GetVectorRegs(regs, sz, vectorReg);
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ApplyPrefixST(regs, js.prefixS, sz);
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}
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void GetVectorRegsPrefixT(u8 *regs, VectorSize sz, int vectorReg) {
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_assert_(js.prefixTFlag & JitState::PREFIX_KNOWN);
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GetVectorRegs(regs, sz, vectorReg);
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ApplyPrefixST(regs, js.prefixT, sz);
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}
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void GetVectorRegsPrefixD(u8 *regs, VectorSize sz, int vectorReg);
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// Utils
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void Comp_ITypeMemLR(MIPSOpcode op, bool load);
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JitOptions jo;
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JitState js;
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IRBlockCache blocks_;
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MIPSState *mips_;
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int dontLogBlocks;
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int logBlocks;
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IRWriter ir;
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// where to write branch-likely trampolines. not used atm
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// u32 blTrampolines_;
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// int blTrampolineCount_;
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public:
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// Code pointers
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const u8 *enterDispatcher;
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const u8 *outerLoop;
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const u8 *outerLoopPCInSCRATCH1;
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const u8 *dispatcherCheckCoreState;
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const u8 *dispatcherPCInSCRATCH1;
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const u8 *dispatcher;
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const u8 *dispatcherNoCheck;
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const u8 *breakpointBailout;
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const u8 *saveStaticRegisters;
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const u8 *loadStaticRegisters;
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const u8 *restoreRoundingMode;
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const u8 *applyRoundingMode;
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const u8 *updateRoundingMode;
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// Indexed by FPCR FZ:RN bits for convenience. Uses SCRATCH2.
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const u8 *convertS0ToSCRATCH1[8];
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};
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} // namespace MIPSComp
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