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https://github.com/hrydgard/ppsspp.git
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4578c3cb54
These generally work, but likely delay slots will make downcount slightly off, and won't resume when you hit run again without manually stepping through them.
167 lines
4.5 KiB
C++
167 lines
4.5 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#pragma once
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#include <string>
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#include <vector>
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#include "Common/CommonTypes.h"
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#include "Core/MIPS/MIPS.h"
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class DebugInterface;
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namespace MIPSAnalyst
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{
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const int MIPS_NUM_GPRS = 32;
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struct RegisterAnalysisResults {
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bool used;
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int firstRead;
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int lastRead;
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int firstWrite;
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int lastWrite;
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int firstReadAsAddr;
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int lastReadAsAddr;
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int readCount;
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int writeCount;
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int readAsAddrCount;
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int TotalReadCount() const { return readCount + readAsAddrCount; }
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int FirstRead() const { return firstReadAsAddr < firstRead ? firstReadAsAddr : firstRead; }
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int LastRead() const { return lastReadAsAddr > lastRead ? lastReadAsAddr : lastRead; }
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void MarkRead(u32 addr) {
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if (firstRead == -1)
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firstRead = addr;
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lastRead = addr;
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readCount++;
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used = true;
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}
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void MarkReadAsAddr(u32 addr) {
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if (firstReadAsAddr == -1)
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firstReadAsAddr = addr;
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lastReadAsAddr = addr;
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readAsAddrCount++;
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used = true;
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}
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void MarkWrite(u32 addr) {
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if (firstWrite == -1)
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firstWrite = addr;
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lastWrite = addr;
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writeCount++;
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used = true;
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}
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};
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struct AnalysisResults {
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RegisterAnalysisResults r[MIPS_NUM_GPRS];
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};
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AnalysisResults Analyze(u32 address);
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// This tells us if the reg is used within intrs of addr (also includes likely delay slots.)
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bool IsRegisterUsed(MIPSGPReg reg, u32 addr, int instrs);
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// This tells us if the reg is clobbered within intrs of addr (e.g. it is surely not used.)
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bool IsRegisterClobbered(MIPSGPReg reg, u32 addr, int instrs);
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struct AnalyzedFunction {
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u32 start;
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u32 end;
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u64 hash;
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u32 size;
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bool isStraightLeaf;
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bool hasHash;
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bool usesVFPU;
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bool foundInSymbolMap;
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char name[64];
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};
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struct ReplacementTableEntry;
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void Reset();
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bool IsRegisterUsed(u32 reg, u32 addr);
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// This will not only create a database of "AnalyzedFunction" structs, it also
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// will insert all the functions it finds into the symbol map, if insertSymbols is true.
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// If we have loaded symbols from the elf, we'll register functions as they are touched
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// so that we don't just dump them all in the cache.
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void RegisterFunction(u32 startAddr, u32 size, const char *name);
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void ScanForFunctions(u32 startAddr, u32 endAddr, bool insertSymbols);
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void ForgetFunctions(u32 startAddr, u32 endAddr);
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void CompileLeafs();
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void SetHashMapFilename(const std::string& filename = "");
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void LoadBuiltinHashMap();
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void LoadHashMap(const std::string& filename);
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void StoreHashMap(std::string filename = "");
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const char *LookupHash(u64 hash, u32 funcSize);
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void ReplaceFunctions();
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void UpdateHashMap();
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void ApplyHashMap();
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std::vector<MIPSGPReg> GetInputRegs(MIPSOpcode op);
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std::vector<MIPSGPReg> GetOutputRegs(MIPSOpcode op);
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MIPSGPReg GetOutGPReg(MIPSOpcode op);
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bool ReadsFromGPReg(MIPSOpcode op, MIPSGPReg reg);
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bool IsDelaySlotNiceReg(MIPSOpcode branchOp, MIPSOpcode op, MIPSGPReg reg1, MIPSGPReg reg2 = MIPS_REG_ZERO);
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bool IsDelaySlotNiceVFPU(MIPSOpcode branchOp, MIPSOpcode op);
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bool IsDelaySlotNiceFPU(MIPSOpcode branchOp, MIPSOpcode op);
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bool IsSyscall(MIPSOpcode op);
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bool OpWouldChangeMemory(u32 pc, u32 addr, u32 size);
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int OpMemoryAccessSize(u32 pc);
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bool IsOpMemoryWrite(u32 pc);
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bool OpHasDelaySlot(u32 pc);
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typedef struct {
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DebugInterface* cpu;
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u32 opcodeAddress;
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MIPSOpcode encodedOpcode;
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// shared between branches and conditional moves
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bool isConditional;
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bool conditionMet;
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// branches
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u32 branchTarget;
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bool isBranch;
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bool isLinkedBranch;
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bool isLikelyBranch;
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bool isBranchToRegister;
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int branchRegisterNum;
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// data access
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bool isDataAccess;
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int dataSize;
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u32 dataAddress;
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bool hasRelevantAddress;
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u32 relevantAddress;
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} MipsOpcodeInfo;
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MipsOpcodeInfo GetOpcodeInfo(DebugInterface* cpu, u32 address);
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} // namespace MIPSAnalyst
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