Unknown W. Brackets c773359095 arm64jit: Tweak matrix vfpu overlap detect, etc. ... Tried making changes to them to guess at issues for #9843, but didn't find any. Still, I think these changes are worthwhile, if small.		2019-06-02 22:10:20 -07:00
..
IRAsm.cpp	Initial commit for IRJit	2016-05-07 13:58:29 +02:00
IRCompALU.cpp	Jit: Respect flags for jit types and features.	2019-02-03 14:57:08 -08:00
IRCompBranch.cpp	irjit: Skip preloading blocks with jump to 0.	2018-01-06 17:23:53 -08:00
IRCompFPU.cpp	Jit: Respect flags for jit types and features.	2019-02-03 14:57:08 -08:00
IRCompLoadStore.cpp	Jit: Respect flags for jit types and features.	2019-02-03 14:57:08 -08:00
IRCompVFPU.cpp	arm64jit: Tweak matrix vfpu overlap detect, etc.	2019-06-02 22:10:20 -07:00
IRFrontend.cpp	jit: Apply hasSetRounding at compile time.	2018-04-01 10:36:16 -07:00
IRFrontend.h	Minor cleanup	2018-01-10 09:19:27 +01:00
IRInst.cpp	IR Interpreter: Add some missing instruction metadata. May help part of #10897	2018-04-11 11:16:41 +02:00
IRInst.h	Core: Add flags to disable jit features.	2019-02-03 13:58:24 -08:00
IRInterpreter.cpp	Clean up some more ifdefs	2019-05-10 23:25:57 +02:00
IRInterpreter.h	irjit: Embed constant inside IRInst.	2018-01-03 23:24:04 -08:00
IRJit.cpp	Core: Add flags to disable jit features.	2019-02-03 13:58:24 -08:00
IRJit.h	arm64jit: Update rounding mode on thread switch.	2018-04-01 10:12:32 -07:00
IRPassSimplify.cpp	irjit: Improve multiple lwr in a row.	2018-01-07 21:06:02 -08:00
IRPassSimplify.h	irjit: Combine lwl/lwr and swl/swr, like before.	2018-01-07 21:05:58 -08:00
IRRegCache.cpp	jit-ir: Less instructions cause flushing in constant propagation.	2016-05-08 23:25:08 +02:00
IRRegCache.h	jit-ir: Less instructions cause flushing in constant propagation.	2016-05-08 23:25:08 +02:00