mirror of
https://github.com/hrydgard/ppsspp.git
synced 2024-11-30 08:50:33 +00:00
262 lines
8.2 KiB
C++
262 lines
8.2 KiB
C++
// Copyright (c) 2021- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#pragma once
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#include "ppsspp_config.h"
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#include <cstdint>
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#include <string>
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#include <unordered_map>
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#include <vector>
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#include "Common/Common.h"
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#if defined(_M_SSE)
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#include <emmintrin.h>
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#endif
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#if PPSSPP_ARCH(ARM64_NEON)
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#if defined(_MSC_VER) && PPSSPP_ARCH(ARM64)
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#include <arm64_neon.h>
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#else
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#include <arm_neon.h>
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#endif
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#endif
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#if PPSSPP_ARCH(ARM)
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#include "Common/ArmEmitter.h"
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#elif PPSSPP_ARCH(ARM64_NEON)
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#include "Common/Arm64Emitter.h"
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#elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
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#include "Common/x64Emitter.h"
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#elif PPSSPP_ARCH(MIPS)
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#include "Common/MipsEmitter.h"
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#else
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#include "Common/FakeEmitter.h"
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#endif
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#include "GPU/Math3D.h"
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namespace Rasterizer {
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// While not part of the reg cache proper, this is the type it is built for.
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#if PPSSPP_ARCH(ARM)
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typedef ArmGen::ARMXCodeBlock BaseCodeBlock;
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#elif PPSSPP_ARCH(ARM64_NEON)
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typedef Arm64Gen::ARM64CodeBlock BaseCodeBlock;
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#elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
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typedef Gen::XCodeBlock BaseCodeBlock;
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#elif PPSSPP_ARCH(MIPS)
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typedef MIPSGen::MIPSCodeBlock BaseCodeBlock;
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#else
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typedef FakeGen::FakeXCodeBlock BaseCodeBlock;
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#endif
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// We also have the types of things that end up in regs.
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#if PPSSPP_ARCH(ARM64_NEON)
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typedef int32x4_t Vec4IntArg;
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typedef int32x4_t Vec4IntResult;
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typedef float32x4_t Vec4FloatArg;
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static inline Vec4IntArg ToVec4IntArg(const Math3D::Vec4<int> &a) { return vld1q_s32(a.AsArray()); }
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static inline Vec4IntArg ToVec4IntArg(const Vec4IntResult &a) { return a; }
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static inline Vec4IntResult ToVec4IntResult(const Math3D::Vec4<int> &a) { return vld1q_s32(a.AsArray()); }
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static inline Vec4FloatArg ToVec4FloatArg(const Math3D::Vec4<float> &a) { return vld1q_f32(a.AsArray()); }
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#elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
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typedef __m128i Vec4IntArg;
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typedef __m128i Vec4IntResult;
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typedef __m128 Vec4FloatArg;
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static inline Vec4IntArg ToVec4IntArg(const Math3D::Vec4<int> &a) { return a.ivec; }
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static inline Vec4IntArg ToVec4IntArg(const Vec4IntResult &a) { return a; }
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static inline Vec4IntResult ToVec4IntResult(const Math3D::Vec4<int> &a) { return a.ivec; }
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static inline Vec4FloatArg ToVec4FloatArg(const Math3D::Vec4<float> &a) { return a.vec; }
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#else
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typedef const Math3D::Vec4<int> &Vec4IntArg;
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typedef Math3D::Vec4<int> Vec4IntResult;
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typedef const Math3D::Vec4<float> &Vec4FloatArg;
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static inline Vec4IntArg ToVec4IntArg(const Math3D::Vec4<int> &a) { return a; }
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static inline Vec4IntResult ToVec4IntResult(const Math3D::Vec4<int> &a) { return a; }
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static inline Vec4FloatArg ToVec4FloatArg(const Math3D::Vec4<float> &a) { return a; }
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#endif
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#if PPSSPP_ARCH(AMD64) && PPSSPP_PLATFORM(WINDOWS) && (defined(_MSC_VER) || defined(__clang__) || defined(__INTEL_COMPILER))
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#define SOFTRAST_CALL __vectorcall
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#else
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#define SOFTRAST_CALL
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#endif
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struct RegCache {
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enum Purpose {
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FLAG_GEN = 0x0100,
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FLAG_TEMP = 0x1000,
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VEC_ZERO = 0x0000,
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VEC_RESULT = 0x0001,
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VEC_RESULT1 = 0x0002,
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VEC_U1 = 0x0003,
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VEC_V1 = 0x0004,
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VEC_INDEX = 0x0005,
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VEC_INDEX1 = 0x0006,
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GEN_SRC_ALPHA = 0x0100,
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GEN_ID = 0x0101,
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GEN_STENCIL = 0x0103,
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GEN_COLOR_OFF = 0x0104,
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GEN_DEPTH_OFF = 0x0105,
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GEN_RESULT = 0x0106,
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GEN_SHIFTVAL = 0x0107,
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GEN_ARG_X = 0x0180,
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GEN_ARG_Y = 0x0181,
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GEN_ARG_Z = 0x0182,
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GEN_ARG_FOG = 0x0183,
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GEN_ARG_ID = 0x0184,
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GEN_ARG_U = 0x0185,
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GEN_ARG_V = 0x0186,
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GEN_ARG_TEXPTR = 0x0187,
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GEN_ARG_BUFW = 0x0188,
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GEN_ARG_LEVEL = 0x0189,
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GEN_ARG_TEXPTR_PTR = 0x018A,
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GEN_ARG_BUFW_PTR = 0x018B,
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GEN_ARG_LEVELFRAC = 0x018C,
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VEC_ARG_COLOR = 0x0080,
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VEC_ARG_MASK = 0x0081,
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VEC_ARG_U = 0x0082,
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VEC_ARG_V = 0x0083,
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VEC_ARG_S = 0x0084,
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VEC_ARG_T = 0x0085,
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VEC_FRAC = 0x0086,
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VEC_TEMP0 = 0x1000,
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VEC_TEMP1 = 0x1001,
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VEC_TEMP2 = 0x1002,
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VEC_TEMP3 = 0x1003,
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VEC_TEMP4 = 0x1004,
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VEC_TEMP5 = 0x1005,
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GEN_TEMP0 = 0x1100,
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GEN_TEMP1 = 0x1101,
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GEN_TEMP2 = 0x1102,
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GEN_TEMP3 = 0x1103,
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GEN_TEMP4 = 0x1104,
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GEN_TEMP5 = 0x1105,
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GEN_TEMP_HELPER = 0x1106,
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VEC_INVALID = 0xFEFF,
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GEN_INVALID = 0xFFFF,
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};
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#if PPSSPP_ARCH(ARM)
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typedef ArmGen::ARMReg Reg;
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static constexpr Reg REG_INVALID_VALUE = ArmGen::INVALID_REG;
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#elif PPSSPP_ARCH(ARM64_NEON)
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typedef Arm64Gen::ARM64Reg Reg;
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static constexpr Reg REG_INVALID_VALUE = Arm64Gen::INVALID_REG;
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#elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
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typedef Gen::X64Reg Reg;
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static constexpr Reg REG_INVALID_VALUE = Gen::INVALID_REG;
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#elif PPSSPP_ARCH(MIPS)
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typedef MIPSGen::MIPSReg Reg;
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static constexpr Reg REG_INVALID_VALUE = MIPSGen::INVALID_REG;
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#else
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typedef int Reg;
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static constexpr Reg REG_INVALID_VALUE = -1;
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#endif
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struct RegStatus {
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Reg reg;
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Purpose purpose;
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uint8_t locked = 0;
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bool forceRetained = false;
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bool everLocked = false;
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};
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// Note: Assumes __vectorcall on Windows.
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// Keep in mind, some args won't fit in regs, this ignores stack and tracks what's in regs.
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void SetupABI(const std::vector<Purpose> &args, bool forceRetain = true);
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// Reset after compile complete, pass false for validate if compile failed.
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void Reset(bool validate);
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// Add register to cache for tracking with initial purpose (won't be locked or force retained.)
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void Add(Reg r, Purpose p);
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// Find registers with one purpose and change to the other.
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void Change(Purpose history, Purpose destiny);
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// Release a previously found or allocated register, setting purpose to invalid.
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void Release(Reg &r, Purpose p);
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// Unlock a previously found or allocated register, but try to retain it.
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void Unlock(Reg &r, Purpose p);
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// Check if the purpose is currently in a register.
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bool Has(Purpose p);
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// Return the register for a given purpose (check with Has() first if not certainly there.)
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Reg Find(Purpose p);
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// Allocate a new register for the given purpose.
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Reg Alloc(Purpose p);
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// Force a register to be retained, even if we run short on regs.
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void ForceRetain(Purpose p);
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// Reverse ForceRetain, and release the register back to invalid.
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void ForceRelease(Purpose p);
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// For getting a specific reg. WARNING: May return a locked reg, so you have to check.
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void GrabReg(Reg r, Purpose p, bool &needsSwap, Reg swapReg, Purpose swapPurpose);
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// For setting the purpose of a specific reg. Returns false if it is locked.
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bool ChangeReg(Reg r, Purpose p);
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// Retrieves whether reg was ever used.
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bool UsedReg(Reg r, Purpose flag);
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private:
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RegStatus *FindReg(Reg r, Purpose p);
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std::vector<RegStatus> regs;
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};
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class CodeBlock : public BaseCodeBlock {
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public:
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virtual std::string DescribeCodePtr(const u8 *ptr);
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virtual void Clear();
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protected:
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CodeBlock(int size);
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RegCache::Reg GetZeroVec();
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void Describe(const std::string &message);
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// Returns amount of stack space used.
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int WriteProlog(int extraStack, const std::vector<RegCache::Reg> &vec, const std::vector<RegCache::Reg> &gen);
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// Returns updated function start position, modifies prolog and finishes writing.
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const u8 *WriteFinalizedEpilog();
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void WriteSimpleConst16x8(const u8 *&ptr, uint8_t value);
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void WriteSimpleConst8x16(const u8 *&ptr, uint16_t value);
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void WriteSimpleConst4x32(const u8 *&ptr, uint32_t value);
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void WriteDynamicConst16x8(const u8 *&ptr, uint8_t value);
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void WriteDynamicConst8x16(const u8 *&ptr, uint16_t value);
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void WriteDynamicConst4x32(const u8 *&ptr, uint32_t value);
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#if PPSSPP_ARCH(ARM64_NEON)
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Arm64Gen::ARM64FloatEmitter fp;
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#endif
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std::unordered_map<const u8 *, std::string> descriptions_;
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Rasterizer::RegCache regCache_;
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private:
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u8 *lastPrologStart_ = nullptr;
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u8 *lastPrologEnd_ = nullptr;
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int savedStack_;
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int firstVecStack_;
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std::vector<RegCache::Reg> prologVec_;
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std::vector<RegCache::Reg> prologGen_;
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};
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};
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