mirror of
https://github.com/hrydgard/ppsspp.git
synced 2024-11-27 23:40:39 +00:00
291 lines
8.3 KiB
C++
291 lines
8.3 KiB
C++
// Copyright (C) 2003 Dolphin Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official SVN repository and contact information can be found at
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// http://code.google.com/p/dolphin-emu/
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#if defined(_M_IX86) || defined(_M_X64)
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#ifdef __ANDROID__
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#include <sys/stat.h>
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#include <fcntl.h>
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#endif
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#include <memory.h>
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#include "base/logging.h"
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#include "base/basictypes.h"
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#include "Common.h"
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#include "CPUDetect.h"
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#include "StringUtils.h"
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#ifdef _WIN32
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#define WIN32_LEAN_AND_MEAN
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#include <Windows.h>
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#define _interlockedbittestandset workaround_ms_header_bug_platform_sdk6_set
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#define _interlockedbittestandreset workaround_ms_header_bug_platform_sdk6_reset
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#define _interlockedbittestandset64 workaround_ms_header_bug_platform_sdk6_set64
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#define _interlockedbittestandreset64 workaround_ms_header_bug_platform_sdk6_reset64
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#include <intrin.h>
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#undef _interlockedbittestandset
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#undef _interlockedbittestandreset
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#undef _interlockedbittestandset64
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#undef _interlockedbittestandreset64
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void do_cpuidex(u32 regs[4], u32 cpuid_leaf, u32 ecxval) {
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__cpuidex((int *)regs, cpuid_leaf, ecxval);
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}
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void do_cpuid(u32 regs[4], u32 cpuid_leaf) {
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__cpuid((int *)regs, cpuid_leaf);
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}
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#else
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#ifdef _M_SSE
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#include <emmintrin.h>
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#define _XCR_XFEATURE_ENABLED_MASK 0
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static unsigned long long _xgetbv(unsigned int index)
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{
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unsigned int eax, edx;
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__asm__ __volatile__("xgetbv" : "=a"(eax), "=d"(edx) : "c"(index));
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return ((unsigned long long)edx << 32) | eax;
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}
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#else
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#define _XCR_XFEATURE_ENABLED_MASK 0
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#endif
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#if !defined(MIPS)
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void do_cpuidex(u32 regs[4], u32 cpuid_leaf, u32 ecxval) {
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#if defined(__i386__) && defined(__PIC__)
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asm (
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"xchgl %%ebx, %1;\n\t"
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"cpuid;\n\t"
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"xchgl %%ebx, %1;\n\t"
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:"=a" (regs[0]), "=r" (regs[1]), "=c" (regs[2]), "=d" (regs[3])
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:"a" (cpuid_leaf), "c" (ecxval));
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#else
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asm (
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"cpuid;\n\t"
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:"=a" (regs[0]), "=b" (regs[1]), "=c" (regs[2]), "=d" (regs[3])
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:"a" (cpuid_leaf), "c" (ecxval));
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#endif
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}
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void do_cpuid(u32 regs[4], u32 cpuid_leaf)
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{
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do_cpuidex(regs, cpuid_leaf, 0);
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}
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#endif
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#endif
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CPUInfo cpu_info;
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CPUInfo::CPUInfo() {
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Detect();
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}
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// Detects the various cpu features
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void CPUInfo::Detect() {
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memset(this, 0, sizeof(*this));
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#ifdef _M_IX86
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Mode64bit = false;
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#elif defined (_M_X64)
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Mode64bit = true;
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OS64bit = true;
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#endif
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num_cores = 1;
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#if PPSSPP_PLATFORM(UWP)
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OS64bit = Mode64bit; // TODO: Not always accurate!
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#elif defined(_WIN32) && defined(_M_IX86)
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BOOL f64 = false;
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IsWow64Process(GetCurrentProcess(), &f64);
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OS64bit = (f64 == TRUE) ? true : false;
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#endif
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// Set obvious defaults, for extra safety
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if (Mode64bit) {
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bSSE = true;
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bSSE2 = true;
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bLongMode = true;
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}
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// Assume CPU supports the CPUID instruction. Those that don't can barely
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// boot modern OS:es anyway.
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u32 cpu_id[4];
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memset(cpu_string, 0, sizeof(cpu_string));
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// Detect CPU's CPUID capabilities, and grab cpu string
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do_cpuid(cpu_id, 0x00000000);
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u32 max_std_fn = cpu_id[0]; // EAX
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*((int *)cpu_string) = cpu_id[1];
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*((int *)(cpu_string + 4)) = cpu_id[3];
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*((int *)(cpu_string + 8)) = cpu_id[2];
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do_cpuid(cpu_id, 0x80000000);
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u32 max_ex_fn = cpu_id[0];
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if (!strcmp(cpu_string, "GenuineIntel"))
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vendor = VENDOR_INTEL;
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else if (!strcmp(cpu_string, "AuthenticAMD"))
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vendor = VENDOR_AMD;
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else
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vendor = VENDOR_OTHER;
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// Set reasonable default brand string even if brand string not available.
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strcpy(brand_string, cpu_string);
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// Detect family and other misc stuff.
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bool ht = false;
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HTT = ht;
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logical_cpu_count = 1;
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if (max_std_fn >= 1) {
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do_cpuid(cpu_id, 0x00000001);
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int family = ((cpu_id[0] >> 8) & 0xf) + ((cpu_id[0] >> 20) & 0xff);
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int model = ((cpu_id[0] >> 4) & 0xf) + ((cpu_id[0] >> 12) & 0xf0);
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// Detect people unfortunate enough to be running PPSSPP on an Atom
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if (family == 6 && (model == 0x1C || model == 0x26 || model == 0x27 || model == 0x35 || model == 0x36 ||
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model == 0x37 || model == 0x4A || model == 0x4D || model == 0x5A || model == 0x5D))
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bAtom = true;
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logical_cpu_count = (cpu_id[1] >> 16) & 0xFF;
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ht = (cpu_id[3] >> 28) & 1;
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if ((cpu_id[3] >> 25) & 1) bSSE = true;
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if ((cpu_id[3] >> 26) & 1) bSSE2 = true;
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if ((cpu_id[2]) & 1) bSSE3 = true;
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if ((cpu_id[2] >> 9) & 1) bSSSE3 = true;
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if ((cpu_id[2] >> 19) & 1) bSSE4_1 = true;
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if ((cpu_id[2] >> 20) & 1) bSSE4_2 = true;
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if ((cpu_id[2] >> 28) & 1) {
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bAVX = true;
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if ((cpu_id[2] >> 12) & 1)
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bFMA = true;
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}
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if ((cpu_id[2] >> 25) & 1) bAES = true;
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if ((cpu_id[3] >> 24) & 1)
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{
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// We can use FXSAVE.
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bFXSR = true;
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}
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// AVX support requires 3 separate checks:
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// - Is the AVX bit set in CPUID? (>>28)
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// - Is the XSAVE bit set in CPUID? ( >>26)
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// - Is the OSXSAVE bit set in CPUID? ( >>27)
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// - XGETBV result has the XCR bit set.
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if (((cpu_id[2] >> 28) & 1) && ((cpu_id[2] >> 27) & 1) && ((cpu_id[2] >> 26) & 1))
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{
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if ((_xgetbv(_XCR_XFEATURE_ENABLED_MASK) & 0x6) == 0x6)
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{
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bAVX = true;
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if ((cpu_id[2] >> 12) & 1)
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bFMA = true;
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}
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}
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if (max_std_fn >= 7)
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{
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do_cpuid(cpu_id, 0x00000007);
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// careful; we can't enable AVX2 unless the XSAVE/XGETBV checks above passed
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if ((cpu_id[1] >> 5) & 1)
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bAVX2 = bAVX;
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if ((cpu_id[1] >> 3) & 1)
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bBMI1 = true;
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if ((cpu_id[1] >> 8) & 1)
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bBMI2 = true;
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}
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}
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if (max_ex_fn >= 0x80000004) {
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// Extract brand string
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do_cpuid(cpu_id, 0x80000002);
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memcpy(brand_string, cpu_id, sizeof(cpu_id));
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do_cpuid(cpu_id, 0x80000003);
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memcpy(brand_string + 16, cpu_id, sizeof(cpu_id));
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do_cpuid(cpu_id, 0x80000004);
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memcpy(brand_string + 32, cpu_id, sizeof(cpu_id));
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}
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if (max_ex_fn >= 0x80000001) {
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// Check for more features.
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do_cpuid(cpu_id, 0x80000001);
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if (cpu_id[2] & 1) bLAHFSAHF64 = true;
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// CmpLegacy (bit 2) is deprecated.
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if ((cpu_id[3] >> 29) & 1) bLongMode = true;
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}
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num_cores = (logical_cpu_count == 0) ? 1 : logical_cpu_count;
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if (max_ex_fn >= 0x80000008) {
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// Get number of cores. This is a bit complicated. Following AMD manual here.
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do_cpuid(cpu_id, 0x80000008);
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int apic_id_core_id_size = (cpu_id[2] >> 12) & 0xF;
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if (apic_id_core_id_size == 0) {
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if (ht) {
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// 0x0B is the preferred method on Core i series processors.
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// Inspired by https://github.com/D-Programming-Language/druntime/blob/23b0d1f41e27638bda2813af55823b502195a58d/src/core/cpuid.d#L562.
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bool hasLeafB = false;
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if (vendor == VENDOR_INTEL && max_std_fn >= 0x0B) {
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do_cpuidex(cpu_id, 0x0B, 0);
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if (cpu_id[1] != 0) {
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logical_cpu_count = cpu_id[1] & 0xFFFF;
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do_cpuidex(cpu_id, 0x0B, 1);
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int totalThreads = cpu_id[1] & 0xFFFF;
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num_cores = totalThreads / logical_cpu_count;
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hasLeafB = true;
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}
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}
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// Old new mechanism for modern Intel CPUs.
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if (!hasLeafB && vendor == VENDOR_INTEL) {
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do_cpuid(cpu_id, 0x00000004);
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int cores_x_package = ((cpu_id[0] >> 26) & 0x3F) + 1;
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HTT = (cores_x_package < logical_cpu_count);
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cores_x_package = ((logical_cpu_count % cores_x_package) == 0) ? cores_x_package : 1;
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num_cores = (cores_x_package > 1) ? cores_x_package : num_cores;
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logical_cpu_count /= cores_x_package;
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}
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}
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} else {
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// Use AMD's new method.
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num_cores = (cpu_id[2] & 0xFF) + 1;
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}
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}
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}
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// Turn the cpu info into a string we can show
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std::string CPUInfo::Summarize()
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{
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std::string sum;
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if (num_cores == 1)
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sum = StringFromFormat("%s, %i core", cpu_string, num_cores);
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else
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{
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sum = StringFromFormat("%s, %i cores", cpu_string, num_cores);
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if (HTT) sum += StringFromFormat(" (%i logical threads per physical core)", logical_cpu_count);
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}
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if (bSSE) sum += ", SSE";
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if (bSSE2) sum += ", SSE2";
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if (bSSE3) sum += ", SSE3";
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if (bSSSE3) sum += ", SSSE3";
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if (bSSE4_1) sum += ", SSE4.1";
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if (bSSE4_2) sum += ", SSE4.2";
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if (HTT) sum += ", HTT";
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if (bAVX) sum += ", AVX";
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if (bFMA) sum += ", FMA";
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if (bAES) sum += ", AES";
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if (bLongMode) sum += ", 64-bit support";
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return sum;
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}
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#endif // defined(_M_IX86) || defined(_M_X64)
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