| .. |
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IRAsm.cpp
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Initial commit for IRJit
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2016-05-07 13:58:29 +02:00 |
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IRCompALU.cpp
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jit-ir: Add div/divu instructions.
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2016-05-14 19:23:52 -07:00 |
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IRCompBranch.cpp
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jit-ir: Decrease downcount after delayslot.
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2016-07-02 16:35:56 -07:00 |
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IRCompFPU.cpp
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jit-ir: Implement memory breakpoints.
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2016-07-02 16:38:30 -07:00 |
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IRCompLoadStore.cpp
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jit-ir: Implement memory breakpoints.
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2016-07-02 16:38:30 -07:00 |
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IRCompVFPU.cpp
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Merge pull request #8840 from unknownbrackets/ir-vfpu
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2016-07-04 10:02:52 +02:00 |
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IRFrontend.cpp
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jit-ir: Implement memory breakpoints.
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2016-07-02 16:38:30 -07:00 |
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IRFrontend.h
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jit-ir: Implement memory breakpoints.
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2016-07-02 16:38:30 -07:00 |
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IRInst.cpp
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jit-ir: Implement memory breakpoints.
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2016-07-02 16:38:30 -07:00 |
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IRInst.h
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jit-ir: Implement memory breakpoints.
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2016-07-02 16:38:30 -07:00 |
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IRInterpreter.cpp
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Merge pull request #8888 from unknownbrackets/warnings
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2016-08-06 10:59:06 +02:00 |
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IRInterpreter.h
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jit-ir: Implement bit reverse instruction.
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2016-05-14 18:21:42 -07:00 |
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IRJit.cpp
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Correct some initialization order warnings.
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2016-08-05 10:46:11 -07:00 |
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IRJit.h
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Correct some initialization order warnings.
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2016-08-05 10:46:11 -07:00 |
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IRPassSimplify.cpp
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jit-ir: Implement memory breakpoints.
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2016-07-02 16:38:30 -07:00 |
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IRPassSimplify.h
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jit-ir: Add load/store reorder and merge passes.
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2016-05-17 21:24:13 -07:00 |
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IRRegCache.cpp
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jit-ir: Less instructions cause flushing in constant propagation.
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2016-05-08 23:25:08 +02:00 |
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IRRegCache.h
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jit-ir: Less instructions cause flushing in constant propagation.
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2016-05-08 23:25:08 +02:00 |
